These file are my configurations to run two linux inmates on raspberry 4b.
Hardware memory is 2G.
How to use?
put three files into configs/arm64 folder, make , .c will be compiled to
.cell
The OS and jailhouse I used is compiled from jailhouse-image repository.
after run "jailhouse enable rpi4-two-ivshmem-net-inmates.cell" there will
produce two network device in root cell. one is set ip as 192.168.19.1 ,
the other should set by yourself to 192.168.20.1
jailhouse cell linux rpi4-linux-demo1.cell \
/boot/vmlinuz* \
-d /etc/jailhouse/dts/inmate-rpi4.dtb \
-i /usr/libexec/jailhouse/demos/rootfs.cpio \
-c "console=ttyS0,115200 ip=192.168.19.2"
jailhouse cell linux rpi4-linux-demo2.cell \
/boot/vmlinuz* \
-d /etc/jailhouse/dts/inmate-rpi4.dtb \
-i /usr/libexec/jailhouse/demos/rootfs.cpio \
-c "console=ttyS0,115200 ip=192.168.20.2"
then the two inmate runs.
I take some content
from
https://github.com/ekut-es/autojail/blob/master/configs/arm64/rpi4-two-ivshmem-net-inmates.c
But modified some content.
Wish this will help someone need it.
lake of doc make me headche.
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/ed7d5b78-da24-41bb-8d36-605086fb26ben%40googlegroups.com.
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[16];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[2];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "linux-demo2",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 185-32,
.console = {
.address = 0xfe215040,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
},
.cpus = {
0b1000,
},
.mem_regions = {
/* IVSHMEM shared memory regions (demo) */
{
.phys_start = 0x4faf0000,
.virt_start = 0x4faf0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x4faf1000,
.virt_start = 0x4faf1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x4fafa000,
.virt_start = 0x4fafa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x4fafc000,
.virt_start = 0x4fafc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x4fafe000,
.virt_start = 0x4fafe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
/* IVSHMEM shared memory region */
JAILHOUSE_SHMEM_NET_REGIONS(0x4fb00000, 1),
/* UART */ {
.phys_start = 0xfe215040,
.virt_start = 0xfe215040,
.size = 0x40,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_8 |
JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM */ {
.phys_start = 0x4f900000,
.virt_start = 0,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* RAM */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
.size = 0x08000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* communication region */ {
.virt_start = 0x80000000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
},
.irqchips = {
/* GIC */ {
.address = 0xff841000,
.pin_base = 32,
.pin_bitmap = {
0,
0,
1 << (125 - 96),
0,
},
},
/* GIC */ {
.address = 0xff841000,
.pin_base = 160,
.pin_bitmap = {
(1 << (185 - 160)) | (1 << (187 - 160)),
0,
0,
0
},
},
},
.pci_devices = {
{ /* IVSHMEM 00:00.0 (demo) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 0 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 0,
.shmem_dev_id = 2,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
{ /* IVSHMEM 00:01.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 2 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 5,
.shmem_dev_id = 1,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[16];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[2];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "linux-demo1",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 185-32,
.console = {
.address = 0xfe215040,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
},
.cpus = {
0b0100,
},
.mem_regions = {
/* IVSHMEM shared memory regions (demo) */
{
.phys_start = 0x2faf0000,
.virt_start = 0x2faf0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x2faf1000,
.virt_start = 0x2faf1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x2fafa000,
.virt_start = 0x2fafa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x2fafc000,
.virt_start = 0x2fafc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
{
.phys_start = 0x2fafe000,
.virt_start = 0x2fafe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
/* IVSHMEM shared memory region */
JAILHOUSE_SHMEM_NET_REGIONS(0x2fb00000, 1),
/* UART */ {
.phys_start = 0xfe215040,
.virt_start = 0xfe215040,
.size = 0x40,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_8 |
JAILHOUSE_MEM_IO_32 | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM */ {
.phys_start = 0x2f900000,
.virt_start = 0,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* RAM */ {
.phys_start = 0x20000000,
.virt_start = 0x20000000,
.size = 0x08000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* communication region */ {
.virt_start = 0x80000000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
},
.irqchips = {
/* GIC */ {
.address = 0xff841000,
.pin_base = 32,
.pin_bitmap = {
0,
0,
1 << (125 - 96),
0,
},
},
/* GIC */ {
.address = 0xff841000,
.pin_base = 160,
.pin_bitmap = {
(1 << (185 - 160)) | (1 << (186 - 160)),
0,
0,
0
},
},
},
.pci_devices = {
{ /* IVSHMEM 00:00.0 (demo) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 0 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 0,
.shmem_dev_id = 1,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
{ /* IVSHMEM 00:01.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 1 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 5,
.shmem_dev_id = 1,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[26];
struct jailhouse_irqchip irqchips[2];
struct jailhouse_pci_device pci_devices[3];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x2fc00000,
//0x51000000,
.size = 0x00400000,
},
.debug_console = {
.address = 0xfe215040,
.size = 0x40,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0xff900000,
// 0xe0000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.pci_domain = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0xff841000,
.gicc_base = 0xff842000,
.gich_base = 0xff844000,
.gicv_base = 0xff846000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "rpi4-two",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 182 - 32,
},
},
.cpus = {
0b1111,
},
.mem_regions = {
/* IVSHMEM shared memory regions for 00:00.0 (demo) */
{
.phys_start = 0x2faf0000,
.virt_start = 0x2faf0000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x2faf1000,
.virt_start = 0x2faf1000,
.size = 0x9000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x2fafa000,
.virt_start = 0x2fafa000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
{
.phys_start = 0x2fafc000,
.virt_start = 0x2fafc000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
{
.phys_start = 0x2fafe000,
.virt_start = 0x2fafe000,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ,
},
/* IVSHMEM shared memory regions for 00:01.0 (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x2fb00000, 0),
/* IVSHMEM shared memory regions for 00:02.0 (networking) */
JAILHOUSE_SHMEM_NET_REGIONS(0x4fb00000, 0),
/* MMIO 1 (permissive) */ {
.phys_start = 0xfd500000,
.virt_start = 0xfd500000,
.size = 0x1b00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* MMIO 2 (permissive) */ {
.phys_start = 0x600000000,
.virt_start = 0x600000000,
.size = 0x4000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM (0M-~762M) */ {
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x2fa10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* ~2M reserved for shared memory regions */
/* 4M reserved for the hypervisor */
/* RAM (768M-4032M) */ {
.phys_start = 0x30000000,
.virt_start = 0x30000000,
.size = 0xcc000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* RAM (4096M-8192M) */ {
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x100000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/*gpio 0xfe200000-0xfe201000*/
// {
// .phys_start = 0xfe200000,
// .virt_start = 0xfe200000,
// .size = 0x1000,
// .flags =
JAILHOUSE_MEM_READ|JAILHOUSE_MEM_WRITE|JAILHOUSE_MEM_IO|JAILHOUSE_MEM_IO_8|JAILHOUSE_MEM_IO_16|JAILHOUSE_MEM_IO_32|JAILHOUSE_MEM_IO_64,
// },
},
.irqchips = {
/* GIC */ {
.address = 0xff841000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
/* GIC */ {
.address = 0xff841000,
.pin_base = 160,
.pin_bitmap = {
0xffffffff, 0xffffffff
},
},
},
.pci_devices = {
{ /* IVSHMEM 0001:00:00.0 (demo) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 0 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 0,
.shmem_dev_id = 0,
.shmem_peers = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
},
{ /* IVSHMEM 0001:00:01.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 1 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 5,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
{ /* IVSHMEM 0001:00:02.0 (networking) */
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 2 << 3,
.bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
.shmem_regions_start = 9,
.shmem_dev_id = 0,
.shmem_peers = 2,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};
