Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: c1489607b44c4b1f1df6ac5163020c46e18250dd
https://github.com/siemens/jailhouse/commit/c1489607b44c4b1f1df6ac5163020c46e18250dd
Author: Dongjiu Geng <[email protected]>
Date: 2021-08-20 (Fri, 20 Aug 2021)
Changed paths:
M hypervisor/arch/arm64/entry.S
M hypervisor/arch/arm64/include/asm/paging.h
Log Message:
-----------
ARM64: Set the right TCR.(I)PS value
According to spec, the {I}PS should be never larger
than the CPU hardware implemented physical address
size(ID_AA64MMFR0_EL1.PARange). Otherwise, it
may lead to some unexpected issues.
We can refer to DDI0487G_a_armv8_arm's description below:
If {I}PS is programmed to a value larger than the
implemented PA size, then the PE behaves as if programmed
with the implemented PA size, but software must not rely
on this behavior. That is, the output address size is never
largerthan the implemented PA size.
Signed-off-by: Dongjiu Geng <[email protected]>
[Jan: changed comment styles]
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 36ef814a1f5c07cd4df0954ff20266fa9fb31935
https://github.com/siemens/jailhouse/commit/36ef814a1f5c07cd4df0954ff20266fa9fb31935
Author: Jan Kiszka <[email protected]>
Date: 2021-08-20 (Fri, 20 Aug 2021)
Changed paths:
M hypervisor/arch/x86/pci.c
Log Message:
-----------
x86: Decode PCI config access violations
This has been a FAQ on the list way too long: Parsing the address port
register content, translating it into the target PCI device and config
space register is not for beginners and even not convenient for experts.
So add a dedicated printk for this case which allows to remove the
address port reporting from the remaining ones.
This now gives
FATAL: Invalid PCI config write, device 05:00.0, reg: 0x44, size: 2
...
analogously to the MMCONFIG access violations.
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/40c4dbdf2665...36ef814a1f5c
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