Dear Jailhouse community， I am currently running into an issue when trying boot jailhouse on QEMU. I follow the guidelines on https://github.com/siemens/jailhouse/tree/wip/kvm. When I use the sysconfig.c created by "jailhouse config create -c ttyS0 --mem-hv 128M --mem-inmates 1536M configs/x86/sysconfig.c" to enable root cell, the issue "FATAL: Invalid PIO read, port: 5658 size: 4" and "FATAL: Invalid MMIO/RAM read" happened. I solved these issues with the help of https://events.static.linuxfound.org/sites/events/files/slides/ELCE2016-Jailhouse-Tutorial.pdf. Attached is the modified sysconfig.c file. However, the root cell will still crash with no log a few minutes later.
Initializing Jailhouse hypervisor v0.12 (5-g06ba27d-dirty) on CPU 0 Code location: 0xfffffffff0000050 Using x2APIC Page pool usage after early setup: mem 108/32207, remap 0/131072 Initializing processors: CPU 0... (APIC ID 0) OK CPU 1... (APIC ID 1) OK CPU 3... (APIC ID 3) OK CPU 2... (APIC ID 2) OK Initializing unit: VT-d DMAR unit @0xfed90000/0x1000 Reserving 24 interrupt(s) for device ff:00.0 at index 0 Initializing unit: IOAPIC Initializing unit: Cache Allocation Technology Initializing unit: PCI Adding PCI device 00:00.0 to cell "RootCell" Adding PCI device 00:01.0 to cell "RootCell" Adding PCI device 00:02.0 to cell "RootCell" Reserving 5 interrupt(s) for device 00:02.0 at index 24 Adding PCI device 00:1b.0 to cell "RootCell" Reserving 1 interrupt(s) for device 00:1b.0 at index 29 Adding PCI device 00:1f.0 to cell "RootCell" Adding PCI device 00:1f.2 to cell "RootCell" Reserving 1 interrupt(s) for device 00:1f.2 at index 30 Adding PCI device 00:1f.3 to cell "RootCell" Page pool usage after late setup: mem 333/32207, remap 65542/131072 Activating hypervisor I want to know if I need to add all the missing PCI memory regions and PCI IO ports to sysconfig.c according to the results of /proc/iomem and /proc/ioports? Best regards, Jiajun Huang -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/56692931-19ec-4a1a-9df9-f7a44eaa1869n%40googlegroups.com.
iomem
Description: Binary data
ioports
Description: Binary data
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Copyright (c) Siemens AG, 2014-2017
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*
* Alternatively, you can use or redistribute this file under the following
* BSD license:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for QEMU Standard PC (Q35 + ICH9, 2009)
* created with '/usr/local/libexec/jailhouse/jailhouse config create -c ttyS0 --mem-hv 128M --mem-inmates 1536M configs/x86/sysconfig.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x68000000$0x16b000000"
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[17];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pio pio_regions[26];
struct jailhouse_pci_device pci_devices[7];
struct jailhouse_pci_capability pci_caps[9];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x16b000000,
.size = 0x8000000,
},
.debug_console = {
.address = 0x3f8,
.type = JAILHOUSE_CON_TYPE_8250,
.flags = JAILHOUSE_CON_ACCESS_PIO |
JAILHOUSE_CON_REGDIST_1,
},
.platform_info = {
.pci_mmconfig_base = 0xb0000000,
.pci_mmconfig_end_bus = 0xff,
.x86 = {
.pm_timer_address = 0x608,
.vtd_interrupt_limit = 128,
.iommu_units = {
{
.type = JAILHOUSE_IOMMU_INTEL,
.base = 0xfed90000,
.size = 0x1000,
},
},
},
},
.root_cell = {
.name = "RootCell",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pio_regions = ARRAY_SIZE(config.pio_regions),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.num_pci_caps = ARRAY_SIZE(config.pci_caps),
},
},
.cpus = {
0x000000000000000f,
},
.mem_regions = {
/* MemRegion: 00000000-0009fbff : System RAM */
{
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0xa0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 000a0000-000bffff : PCI Bus 0000:00 adding */
{
.phys_start = 0xa0000,
.virt_start = 0xa0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 00100000-7ffdefff : System RAM */
{
.phys_start = 0x100000,
.virt_start = 0x100000,
.size = 0x7fedf000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: fd000000-fdffffff : 0000:00:01.0 */
{
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0x1000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: feb40000-feb7ffff : 0000:00:02.0 */
{
.phys_start = 0xfeb40000,
.virt_start = 0xfeb40000,
.size = 0x40000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: feb80000-feb9ffff : e1000e */
{
.phys_start = 0xfeb80000,
.virt_start = 0xfeb80000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: feba0000-febbffff : e1000e */
{
.phys_start = 0xfeba0000,
.virt_start = 0xfeba0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febd1000-febd3fff : e1000e */
{
.phys_start = 0xfebd1000,
.virt_start = 0xfebd1000,
.size = 0x3000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febd4000-febd7fff : ICH HD audio */
{
.phys_start = 0xfebd4000,
.virt_start = 0xfebd4000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febd8000-febd8fff : 0000:00:01.0 */
{
.phys_start = 0xfebd8000,
.virt_start = 0xfebd8000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: febd9000-febd9fff : ahci */
{
.phys_start = 0xfebd9000,
.virt_start = 0xfebd9000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: fed00000-fed003ff : PNP0103:00 */
{
.phys_start = 0xfed00000,
.virt_start = 0xfed00000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 100000000-168dfffff : System RAM */
{
.phys_start = 0x100000000,
.virt_start = 0x100000000,
.size = 0x68e00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 168e00000-16affffff : Kernel */
{
.phys_start = 0x168e00000,
.virt_start = 0x168e00000,
.size = 0x2200000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 1d3000000-27fffffff : System RAM */
{
.phys_start = 0x1d3000000,
.virt_start = 0x1d3000000,
.size = 0xad000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* MemRegion: 000c0000-000dffff : ROMs */
{
.phys_start = 0xc0000,
.virt_start = 0xc0000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
/* MemRegion: 173000000-1d2ffffff : JAILHOUSE Inmate Memory */
{
.phys_start = 0x173000000,
.virt_start = 0x173000000,
.size = 0x60000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* IOAPIC 0, GSI base 0 */
{
.address = 0xfec00000,
.id = 0xff00,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
},
},
},
.pio_regions = {
/* Port I/O: 0000-001f : dma1 */
PIO_RANGE(0x0, 0x20),
/* Port I/O: 0020-0021 : pic1 */
PIO_RANGE(0x20, 0x2),
/* Port I/O: 0040-0043 : timer0 */
PIO_RANGE(0x40, 0x4),
/* Port I/O: 0050-0053 : timer1 */
PIO_RANGE(0x50, 0x4),
/* Port I/O: 0060-0060 : keyboard */
PIO_RANGE(0x60, 0x1),
/* Port I/O: 0064-0064 : keyboard */
PIO_RANGE(0x64, 0x1),
/* Port I/O: 0070-0077 : rtc0 */
PIO_RANGE(0x70, 0x8),
/* Port I/O: 0080-008f : dma page reg */
PIO_RANGE(0x80, 0x10),
/* Port I/O: 00a0-00a1 : pic2 */
PIO_RANGE(0xa0, 0x2),
/* Port I/O: 00c0-00df : dma2 */
PIO_RANGE(0xc0, 0x20),
/* Port I/O: 00f0-00ff : fpu */
PIO_RANGE(0xf0, 0x10),
/* Port I/O: 02f8-02ff : serial */
PIO_RANGE(0x2f8, 0x8),
/* Port I/O: 0378-037a : parport0 */
PIO_RANGE(0x378, 0x3),
/* Port I/O: 03c0-03df : vga+ */
PIO_RANGE(0x3c0, 0x20),
/* Port I/O: 03f8-03ff : serial */
PIO_RANGE(0x3f8, 0x8),
/* Port I/O: 0510-051b : fw_cfg_io */
PIO_RANGE(0x510, 0xc),
/* Port I/O: 0600-0603 : ACPI PM1a_EVT_BLK */
PIO_RANGE(0x600, 0x4),
/* Port I/O: 0604-0605 : ACPI PM1a_CNT_BLK */
PIO_RANGE(0x604, 0x2),
/* Port I/O: 0608-060b : ACPI PM_TMR */
PIO_RANGE(0x608, 0x4),
/* Port I/O: 0620-062f : ACPI GPE0_BLK */
PIO_RANGE(0x620, 0x10),
/* Port I/O: 0630-0633 : iTCO_wdt.1.auto */
PIO_RANGE(0x630, 0x4),
/* Port I/O: 0660-067f : iTCO_wdt.1.auto */
PIO_RANGE(0x660, 0x20),
/* Port I/O: 0700-073f : 0000:00:1f.3 */
PIO_RANGE(0x700, 0x40),
/* Port I/O: c040-c05f : 0000:00:02.0 */
PIO_RANGE(0xc040, 0x20),
/* Port I/O: c060-c07f : 0000:00:1f.2 */
PIO_RANGE(0xc060, 0x20),
PIO_RANGE(0x5658, 0x4),
},
.pci_devices = {
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x0,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x8,
.bar_mask = {
0xff000000, 0x00000000, 0xfffff000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.bar_mask = {
0xfffe0000, 0xfffe0000, 0xffffffe0,
0xffffc000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 6,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 5,
.msix_region_size = 0x1000,
.msix_address = 0xfebd0000,
},
/* PCIDevice: 00:1b.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xd8,
.bar_mask = {
0xffffc000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 6,
.num_caps = 1,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xf8,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xfa,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0xffffffe0, 0xfffff000,
},
.caps_start = 7,
.num_caps = 2,
.num_msi_vectors = 1,
.msi_64bits = 1,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
/* PCIDevice: 00:1f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
.iommu = 0,
.domain = 0x0,
.bdf = 0xfb,
.bar_mask = {
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0xffffffc0, 0x00000000,
},
.caps_start = 0,
.num_caps = 0,
.num_msi_vectors = 0,
.msi_64bits = 0,
.msi_maskable = 0,
.num_msix_vectors = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
},
.pci_caps = {
/* PCIDevice: 00:02.0 */
{
.id = PCI_CAP_ID_PM,
.start = 0xc8,
.len = 0x8,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_MSI,
.start = 0xd0,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_EXP,
.start = 0xe0,
.len = 0x14,
.flags = 0,
},
{
.id = PCI_CAP_ID_MSIX,
.start = 0xa0,
.len = 0xc,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_EXT_CAP_ID_ERR | JAILHOUSE_PCI_EXT_CAP,
.start = 0x100,
.len = 0x40,
.flags = 0,
},
{
.id = PCI_EXT_CAP_ID_DSN | JAILHOUSE_PCI_EXT_CAP,
.start = 0x140,
.len = 0xc,
.flags = 0,
},
/* PCIDevice: 00:1b.0 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x60,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
/* PCIDevice: 00:1f.2 */
{
.id = PCI_CAP_ID_MSI,
.start = 0x80,
.len = 0xe,
.flags = JAILHOUSE_PCICAPS_WRITE,
},
{
.id = PCI_CAP_ID_SATA,
.start = 0xa8,
.len = 0x2,
.flags = 0,
},
},
};
