Inmate cell configurations all look alike - more or less. Let's create a couple of header files to hide the fastidious stuff (structure field names and so on) so that .c cell configuration files look a bit less ugly.
Signed-off-by: Stephane Viau <[email protected]> --- v1 -> v2: - Add PCI and Console helpers (needed for inamte cell conversion example) Signed-off-by: Stephane Viau <[email protected]> --- configs/arm64/cell-create.h | 67 +++++++++++++++++++++ configs/arm64/cell-helper.h | 108 ++++++++++++++++++++++++++++++++++ configs/arm64/cell-template.c | 51 ++++++++++++++++ 3 files changed, 226 insertions(+) create mode 100644 configs/arm64/cell-create.h create mode 100644 configs/arm64/cell-helper.h create mode 100644 configs/arm64/cell-template.c diff --git a/configs/arm64/cell-create.h b/configs/arm64/cell-create.h new file mode 100644 index 00000000..c562b4e6 --- /dev/null +++ b/configs/arm64/cell-create.h @@ -0,0 +1,67 @@ +/* + * Cell Configuration - Structure definition + * + * Copyright 2021 NXP + * + * Authors: + * Stephane Viau <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/types.h> +#include <jailhouse/cell-config.h> + +struct { + struct jailhouse_cell_desc cell; + __u64 cpus[1]; + struct jailhouse_memory mem_regions[CONFIG_INMATE_REGIONS_NUM + 1]; + struct jailhouse_irqchip irqchips[CONFIG_INMATE_IRQCHIPS_NUM]; + struct jailhouse_pci_device pci_devices[CONFIG_INMATE_PCI_DEVICES_NUM]; +} __attribute__((packed)) config = { + .cell = { + .signature = JAILHOUSE_CELL_DESC_SIGNATURE, + .revision = JAILHOUSE_CONFIG_REVISION, + .name = CONFIG_INMATE_NAME, + .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, + + .cpu_set_size = sizeof(config.cpus), + .num_memory_regions = ARRAY_SIZE(config.mem_regions), + .num_irqchips = ARRAY_SIZE(config.irqchips), + .num_pci_devices = ARRAY_SIZE(config.pci_devices), + .cpu_reset_address = CONFIG_INMATE_BASE, +#ifdef CONFIG_INMATE_VPCI_IRQ_BASE + .vpci_irq_base = CONFIG_INMATE_VPCI_IRQ_BASE, +#endif +#ifdef CONFIG_INMATE_CONSOLE + .console = CONFIG_INMATE_CONSOLE, +#endif + }, + + .cpus = { + /* + * bitmap of cores used by the inmate cell + */ + CONFIG_INMATE_CORE_BITMAP, + }, + + .mem_regions = { + COMM_REGION_RW(0x80000000, KB(4)), /* communication region */ + CONFIG_INMATE_REGIONS + }, + + .irqchips = { + { + .address = CONFIG_INMATE_IRQCHIPS_ADDR, + .pin_base = CONFIG_INMATE_IRQCHIPS_BASE, + .pin_bitmap = { + CONFIG_INMATE_IRQCHIPS_BITMAP + } + } + }, + + .pci_devices = { + CONFIG_INMATE_PCI_DEVICES + }, +}; diff --git a/configs/arm64/cell-helper.h b/configs/arm64/cell-helper.h new file mode 100644 index 00000000..525d91c6 --- /dev/null +++ b/configs/arm64/cell-helper.h @@ -0,0 +1,108 @@ +/* + * Cell Configuration - Generic definitions + * + * Copyright 2021 NXP + * + * Authors: + * Stephane Viau <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + */ + +#ifndef KB +#define KB(bytes) (1024 * (bytes)) +#define MB(bytes) (1024 * KB(bytes)) +#endif + +#define REGION(phys, virt, bytes) \ + .phys_start = (phys), \ + .virt_start = (virt), \ + .size = (bytes) \ + +#define MEM_REGION_ROS(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, \ + } + +#define MEM_REGION_RW(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, \ + } + +#define MEM_REGION_RWS(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_ROOTSHARED, \ + } + +#define COMM_REGION_RW(virt, bytes) \ + { \ + REGION(0x00000000, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_COMM_REGION, \ + } + +#define MEM_REGION_RWX(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_EXECUTE, \ + } + +#define MEM_REGION_RWXL(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, \ + } + +#define MMIO_REGION_RO(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_IO, \ + } + +#define MMIO_REGION_ROS(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_IO | \ + JAILHOUSE_MEM_ROOTSHARED, \ + } + +#define MMIO_REGION_RW(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_IO, \ + } + +#define MMIO_REGION_RWS(phys, virt, bytes) \ + { \ + REGION(phys, virt, bytes), \ + .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | \ + JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, \ + } + +#define PCI_DEVICE_IVSHMEM(_domain, _bdf, regions_start, dev_id, peers) \ + { \ + .type = JAILHOUSE_PCI_TYPE_IVSHMEM, \ + .domain = _domain, \ + .bdf = _bdf, \ + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, \ + .shmem_regions_start = regions_start, \ + .shmem_dev_id = dev_id, \ + .shmem_peers = peers, \ + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, \ + } + +#define CONSOLE(_address, _type, _flags) \ + { \ + .address = _address, \ + .type = _type, \ + .flags = _flags, \ + } diff --git a/configs/arm64/cell-template.c b/configs/arm64/cell-template.c new file mode 100644 index 00000000..c6981a51 --- /dev/null +++ b/configs/arm64/cell-template.c @@ -0,0 +1,51 @@ +/* + * Cell Configuration - Structure definition + * + * Copyright 2021 NXP + * + * Authors: + * Stephane Viau <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include "cell-helper.h" + +/* Name, cores, entry point */ +#define CONFIG_INMATE_NAME "inmate-cell-name" +#define CONFIG_INMATE_CORE_BITMAP (0b1100) /* inmate uses cores 2 and 3 */ +#define CONFIG_INMATE_BASE (0xc0000000) /* entry point in DDR */ + +/* Memory & peripherals */ +#define CONFIG_INMATE_REGIONS_NUM (1) +#define CONFIG_INMATE_REGIONS \ + MEM_REGION_RWXL(0xc0000000, CONFIG_INMATE_BASE, MB(16)), /* RAM */ \ + +/* GIC */ +#define CONFIG_INMATE_IRQCHIPS_NUM (1) +#define CONFIG_INMATE_IRQCHIPS_ADDR (0x38800000) /* GIC DISTRIBUTOR BASE ADDR */ +#define CONFIG_INMATE_IRQCHIPS_BASE (32) +#define CONFIG_INMATE_IRQCHIPS_BITMAP \ + /* interrupts 32..63 */ \ + 0, \ + /* interrupts 64..95 */ \ + 0, \ + /* interrupts 96..127 */ \ + 1 << (76 + 32 - 96), /* SPI */ \ + /* interrupts 128..159 */ \ + 0 + +#define CONFIG_INMATE_VPCI_IRQ_BASE (76) + +#define CONFIG_INMATE_PCI_DEVICES_NUM (1) +#define CONFIG_INMATE_PCI_DEVICES \ + PCI_DEVICE_IVSHMEM(2, 0, 0, 1, 1) + +/* + * #define CONFIG_INMATE_CONSOLE \ + * CONSOLE(0x30890000, JAILHOUSE_CON_TYPE_IMX, \ + * JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4) + */ + +#include "cell-create.h" -- 2.34.0 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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