Add eMMC support for k3-am654-idk in a linux inmate cell with both
k3-am654-idk-linux-demo-emmc.c configuration, and respective device
tree changes.

Signed-off-by: Matt Ranostay <[email protected]>
---
 .../arm64/dts/inmate-k3-am654-idk-emmc.dts    |  45 ++++
 configs/arm64/k3-am654-idk-linux-demo-emmc.c  | 208 ++++++++++++++++++
 2 files changed, 253 insertions(+)
 create mode 100644 configs/arm64/dts/inmate-k3-am654-idk-emmc.dts
 create mode 100644 configs/arm64/k3-am654-idk-linux-demo-emmc.c

diff --git a/configs/arm64/dts/inmate-k3-am654-idk-emmc.dts 
b/configs/arm64/dts/inmate-k3-am654-idk-emmc.dts
new file mode 100644
index 00000000..150e31fe
--- /dev/null
+++ b/configs/arm64/dts/inmate-k3-am654-idk-emmc.dts
@@ -0,0 +1,45 @@
+/dts-v1/;
+
+#include "inmate-k3-am654-idk.dts"
+
+/ {
+       sdhci0: mmc@4f80000 {
+               compatible = "ti,am654-sdhci-5.1";
+               reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
+               power-domains = <&k3_pds 47 1>;
+               clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
+               clock-names = "clk_ahb", "clk_xin";
+               interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+               mmc-ddr-1_8v;
+               mmc-hs200-1_8v;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-mmc-hs = <0x0>;
+               ti,otap-del-sel-sd-hs = <0x0>;
+               ti,otap-del-sel-sdr12 = <0x0>;
+               ti,otap-del-sel-sdr25 = <0x0>;
+               ti,otap-del-sel-sdr50 = <0x8>;
+               ti,otap-del-sel-sdr104 = <0x7>;
+               ti,otap-del-sel-ddr50 = <0x5>;
+               ti,otap-del-sel-ddr52 = <0x5>;
+               ti,otap-del-sel-hs200 = <0x5>;
+               ti,otap-del-sel-hs400 = <0x0>;
+               ti,trm-icp = <0x8>;
+               dma-coherent;
+       };
+};
+
+&mcu_uart0 {
+       power-domains = <&k3_pds 149 1>;
+};
+
+&k3_pds {
+       #power-domain-cells = <2>;
+};
+
+&sdhci0 {
+       /* eMMC */
+       non-removable;
+       ti,driver-strength-ohm = <50>;
+       bus-width = <8>;
+       disable-wp;
+};
diff --git a/configs/arm64/k3-am654-idk-linux-demo-emmc.c 
b/configs/arm64/k3-am654-idk-linux-demo-emmc.c
new file mode 100644
index 00000000..9fbc7a5f
--- /dev/null
+++ b/configs/arm64/k3-am654-idk-linux-demo-emmc.c
@@ -0,0 +1,208 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for Linux inmate on AM654 based platforms
+ * 2 CPUs, 512MB RAM, 1 serial port(MCU UART), eMMC
+ *
+ * Copyright (c) 2019, 2022 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Authors:
+ *  Lokesh Vutla <[email protected]>
+ *  Matt Ranostay <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+#ifndef CONFIG_INMATE_BASE
+#define CONFIG_INMATE_BASE 0x0000000
+#endif
+
+struct {
+       struct jailhouse_cell_desc cell;
+       __u64 cpus[1];
+       struct jailhouse_memory mem_regions[19];
+       struct jailhouse_irqchip irqchips[3];
+       struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+       .cell = {
+               .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+               .revision = JAILHOUSE_CONFIG_REVISION,
+               .name = "k3-am654-idk-linux-demo-emmc",
+               .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+               .cpu_set_size = sizeof(config.cpus),
+               .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+               .num_irqchips = ARRAY_SIZE(config.irqchips),
+               .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+               .cpu_reset_address = 0x0,
+               .vpci_irq_base = 189 - 32,
+
+               .console = {
+                       .address = 0x40a00000,
+                       .divider = 0x35,
+                       .type = JAILHOUSE_CON_TYPE_8250,
+                       .flags = JAILHOUSE_CON_ACCESS_MMIO |
+                                JAILHOUSE_CON_REGDIST_4,
+               },
+       },
+
+       .cpus = {
+               0xc,
+       },
+
+       .mem_regions = {
+               /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+               {
+                       .phys_start = 0x8dfa00000,
+                       .virt_start = 0x8dfa00000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+               },
+               {
+                       .phys_start = 0x8dfa10000,
+                       .virt_start = 0x8dfa10000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_ROOTSHARED,
+               },
+               /* Peer 0 */ {
+                       .phys_start = 0x8dfa20000,
+                       .virt_start = 0x8dfa20000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+               },
+               /* Peer 1 */ {
+                       .phys_start = 0x8dfa30000,
+                       .virt_start = 0x8dfa30000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+               },
+               /* Peer 2 */ {
+                       .phys_start = 0x8dfa40000,
+                       .virt_start = 0x8dfa40000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_ROOTSHARED,
+               },
+               /* IVSHMEM shared memory region for 00:01.0 */
+               JAILHOUSE_SHMEM_NET_REGIONS(0x8dfb00000, 1),
+               /* RAM load */ {
+                       .phys_start = 0x8FFFF0000,
+                       .virt_start = 0x0,
+                       .size = 0x10000,        /* 64KB */
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+                               JAILHOUSE_MEM_LOADABLE,
+               },
+               /* RAM load */ {
+                       .phys_start = 0x8e0000000,
+                       .virt_start = 0x8e0000000,
+                       .size = 0x1fff0000,     /* (512MB - 64KB) */
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+                               JAILHOUSE_MEM_LOADABLE,
+               },
+               /* MCU UART0 */ {
+                       .phys_start = 0x40a00000,
+                       .virt_start = 0x40a00000,
+                       .size = 0x10000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* sdhci0 */ {
+                       .phys_start = 0x4f80000,
+                       .virt_start = 0x4f80000,
+                       .size = 0x1000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* sdhci0 */ {
+                       .phys_start = 0x4f90000,
+                       .virt_start = 0x4f90000,
+                       .size = 0x1000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* main sproxy target_data host_id=A53_3 */ {
+                       .phys_start = 0x3240f000,
+                       .virt_start = 0x3240f000,
+                       .size = 0x05000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* main sproxy rt host_id=A53_3 */ {
+                       .phys_start = 0x3280f000,
+                       .virt_start = 0x3280f000,
+                       .size = 0x05000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* main sproxy scfg host_id=A53_3 */ {
+                       .phys_start = 0x32c0f000,
+                       .virt_start = 0x32c0f000,
+                       .size = 0x05000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO,
+               },
+               /* communication region */ {
+                       .virt_start = 0x80000000,
+                       .size = 0x00001000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_COMM_REGION,
+               },
+       },
+
+       .irqchips = {
+               {
+                       .address = 0x01800000,
+                       .pin_base = 32,
+                       .pin_bitmap = {
+                       0x0, 0x80, 0x00, 0,
+                       },
+               },
+               {
+                       .address = 0x01800000,
+                       .pin_base = 160,
+                       .pin_bitmap = {
+                       /* sdhc */
+                       1 << (168 - 160) |
+                       /* vpci */
+                       1 << (189 - 160) |
+                       1 << (190 - 160),
+                       0x00, 0x00, 0,
+                       },
+               },
+               {
+                       .address = 0x01800000,
+                       .pin_base = 544,
+                       .pin_bitmap = {
+                       0, 0x200000, 0, 0,
+                       },
+               },
+       },
+
+       .pci_devices = {
+               /* 00:00.0 */ {
+                       .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+                       .bdf = 0 << 3,
+                       .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX_64K,
+                       .shmem_regions_start = 0,
+                       .shmem_dev_id = 2,
+                       .shmem_peers = 3,
+                       .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+               },
+               /* 00:01.0 */ {
+                       .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+                       .bdf = 1 << 3,
+                       .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX_64K,
+                       .shmem_regions_start = 5,
+                       .shmem_dev_id = 1,
+                       .shmem_peers = 2,
+                       .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+               },
+       },
+};
-- 
2.30.2

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