The Renesas R-Car and RZ/G2 families have SCIF for serial communication. So introduce SCIF support.
Signed-off-by: Lad Prabhakar <[email protected]> --- Documentation/debug-output.md | 1 + hypervisor/arch/arm-common/Kbuild | 2 +- hypervisor/arch/arm-common/dbg-write.c | 2 + hypervisor/arch/arm-common/include/asm/uart.h | 2 +- hypervisor/arch/arm-common/uart-scif.c | 44 +++++++++++++ include/jailhouse/console.h | 1 + inmates/lib/arm-common/Makefile.lib | 2 +- inmates/lib/arm-common/uart-scif.c | 65 +++++++++++++++++++ inmates/lib/arm-common/uart.c | 2 + 9 files changed, 118 insertions(+), 3 deletions(-) create mode 100644 hypervisor/arch/arm-common/uart-scif.c create mode 100644 inmates/lib/arm-common/uart-scif.c diff --git a/Documentation/debug-output.md b/Documentation/debug-output.md index 50d91e29..b364bf08 100644 --- a/Documentation/debug-output.md +++ b/Documentation/debug-output.md @@ -28,6 +28,7 @@ Possible debug outputs for arm and arm64: - JAILHOUSE_CON_TYPE_MVEBU /* Marvell UART */ - JAILHOUSE_CON_TYPE_HSCIF /* Renesas HSCIF UART */ - JAILHOUSE_CON_TYPE_SCIFA /* Renesas SCIFA UART */ + - JAILHOUSE_CON_TYPE_SCIF /* Renesas SCIF UART */ - JAILHOUSE_CON_TYPE_IMX /* NXP i.MX UART */ - JAILHOUSE_CON_TYPE_IMX_LPUART/* NXP i.MX LPUART */ diff --git a/hypervisor/arch/arm-common/Kbuild b/hypervisor/arch/arm-common/Kbuild index 9ddbc950..885eecd4 100644 --- a/hypervisor/arch/arm-common/Kbuild +++ b/hypervisor/arch/arm-common/Kbuild @@ -18,7 +18,7 @@ ccflags-$(CONFIG_JAILHOUSE_GCOV) += -fprofile-arcs -ftest-coverage objs-y += dbg-write.o lib.o psci.o control.o paging.o mmu_cell.o setup.o objs-y += irqchip.o pci.o ivshmem.o uart-pl011.o uart-xuartps.o uart-mvebu.o -objs-y += uart-hscif.o uart-scifa.o uart-imx.o uart-imx-lpuart.o +objs-y += uart-hscif.o uart-scifa.o uart-imx.o uart-imx-lpuart.o uart-scif.o objs-y += gic-v2.o gic-v3.o smccc.o common-objs-y = $(addprefix ../arm-common/,$(objs-y)) diff --git a/hypervisor/arch/arm-common/dbg-write.c b/hypervisor/arch/arm-common/dbg-write.c index d4cd4399..0a758b09 100644 --- a/hypervisor/arch/arm-common/dbg-write.c +++ b/hypervisor/arch/arm-common/dbg-write.c @@ -34,6 +34,8 @@ void arch_dbg_write_init(void) uart = &uart_mvebu_ops; else if (con_type == JAILHOUSE_CON_TYPE_HSCIF) uart = &uart_hscif_ops; + else if (con_type == JAILHOUSE_CON_TYPE_SCIF) + uart = &uart_scif_ops; else if (con_type == JAILHOUSE_CON_TYPE_SCIFA) uart = &uart_scifa_ops; else if (con_type == JAILHOUSE_CON_TYPE_IMX) diff --git a/hypervisor/arch/arm-common/include/asm/uart.h b/hypervisor/arch/arm-common/include/asm/uart.h index f620501d..8a505aa3 100644 --- a/hypervisor/arch/arm-common/include/asm/uart.h +++ b/hypervisor/arch/arm-common/include/asm/uart.h @@ -12,4 +12,4 @@ extern struct uart_chip uart_pl011_ops, uart_xuartps_ops, uart_mvebu_ops, uart_hscif_ops, uart_scifa_ops, uart_imx_ops, - uart_imx_lpuart_ops; + uart_imx_lpuart_ops, uart_scif_ops; diff --git a/hypervisor/arch/arm-common/uart-scif.c b/hypervisor/arch/arm-common/uart-scif.c new file mode 100644 index 00000000..e3e3372d --- /dev/null +++ b/hypervisor/arch/arm-common/uart-scif.c @@ -0,0 +1,44 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (C) 2022 Renesas Electronics Corp. + * + * Authors: + * Lad Prabhakar <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + */ + +#include <jailhouse/mmio.h> +#include <jailhouse/processor.h> +#include <jailhouse/uart.h> + +#define SCIF_SCFTDR 0x0c /* Transmit FIFO data register */ +#define SCIF_SCFSR 0x10 /* Serial status register */ +#define SCIF_SCFSR_TDFE 0x20 +#define SCIF_SCFSR_TEND 0x40 + +static void uart_init(struct uart_chip *chip) +{ +} + +static bool uart_is_busy(struct uart_chip *chip) +{ + return (!((SCIF_SCFSR_TDFE | SCIF_SCFSR_TEND) & + mmio_read16(chip->virt_base + SCIF_SCFSR))); +} + +static void uart_write_char(struct uart_chip *chip, char c) +{ + mmio_write8(chip->virt_base + SCIF_SCFTDR, c); + mmio_write16(chip->virt_base + SCIF_SCFSR, + mmio_read16(chip->virt_base + SCIF_SCFSR) & + ~(SCIF_SCFSR_TDFE | SCIF_SCFSR_TEND)); +} + +struct uart_chip uart_scif_ops = { + .init = uart_init, + .is_busy = uart_is_busy, + .write_char = uart_write_char, +}; diff --git a/include/jailhouse/console.h b/include/jailhouse/console.h index 34dd7209..e7c934a5 100644 --- a/include/jailhouse/console.h +++ b/include/jailhouse/console.h @@ -50,6 +50,7 @@ #define JAILHOUSE_CON_TYPE_SCIFA 0x0007 #define JAILHOUSE_CON_TYPE_IMX 0x0008 #define JAILHOUSE_CON_TYPE_IMX_LPUART 0x0009 +#define JAILHOUSE_CON_TYPE_SCIF 0x000a /* Flags: bit 0 is used to select PIO (cleared) or MMIO (set) access */ #define JAILHOUSE_CON_ACCESS_PIO 0x0000 diff --git a/inmates/lib/arm-common/Makefile.lib b/inmates/lib/arm-common/Makefile.lib index c13696f3..b50533e4 100644 --- a/inmates/lib/arm-common/Makefile.lib +++ b/inmates/lib/arm-common/Makefile.lib @@ -40,7 +40,7 @@ objs-y := ../string.o ../cmdline.o ../setup.o ../alloc.o ../uart-8250.o objs-y += ../printk.o ../pci.o objs-y += printk.o gic.o mem.o pci.o timing.o setup.o uart.o objs-y += uart-xuartps.o uart-mvebu.o uart-hscif.o uart-scifa.o uart-imx.o -objs-y += uart-pl011.o uart-imx-lpuart.o +objs-y += uart-pl011.o uart-imx-lpuart.o uart-scif.o objs-y += gic-v2.o gic-v3.o common-objs-y = $(addprefix ../arm-common/,$(objs-y)) diff --git a/inmates/lib/arm-common/uart-scif.c b/inmates/lib/arm-common/uart-scif.c new file mode 100644 index 00000000..aa15c6f9 --- /dev/null +++ b/inmates/lib/arm-common/uart-scif.c @@ -0,0 +1,65 @@ +/* + * Jailhouse, a Linux-based partitioning hypervisor + * + * Copyright (C) 2022 Renesas Electronics Corp. + * + * Authors: + * Lad Prabhakar <[email protected]> + * + * This work is licensed under the terms of the GNU GPL, version 2. See + * the COPYING file in the top-level directory. + * + * Alternatively, you can use or redistribute this file under the following + * BSD license: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <inmate.h> +#include <uart.h> + +#define SCIF_SCFTDR 0x0c /* Transmit FIFO data register */ +#define SCIF_SCFSR 0x10 /* Serial status register */ +#define SCIF_SCFSR_TDFE 0x20 +#define SCIF_SCFSR_TEND 0x40 + +static void uart_scif_init(struct uart_chip *chip) +{ +} + +static bool uart_scif_is_busy(struct uart_chip *chip) +{ + return (!((SCIF_SCFSR_TDFE | SCIF_SCFSR_TEND) & + mmio_read16(chip->base + SCIF_SCFSR))); +} + +static void uart_scif_write(struct uart_chip *chip, char c) +{ + mmio_write8(chip->base + SCIF_SCFTDR, c); + mmio_write16(chip->base + SCIF_SCFSR, + mmio_read16(chip->base + SCIF_SCFSR) & + ~(SCIF_SCFSR_TDFE | SCIF_SCFSR_TEND)); +} + +DEFINE_UART(scif, "SCIF", JAILHOUSE_CON_TYPE_SCIF); diff --git a/inmates/lib/arm-common/uart.c b/inmates/lib/arm-common/uart.c index 90a322b5..c03909a8 100644 --- a/inmates/lib/arm-common/uart.c +++ b/inmates/lib/arm-common/uart.c @@ -45,6 +45,7 @@ DECLARE_UART(imx); DECLARE_UART(imx_lpuart); DECLARE_UART(mvebu); DECLARE_UART(pl011); +DECLARE_UART(scif); DECLARE_UART(scifa); DECLARE_UART(xuartps); @@ -55,6 +56,7 @@ struct uart_chip *uart_array[] = { &UART_OPS_NAME(imx_lpuart), &UART_OPS_NAME(mvebu), &UART_OPS_NAME(pl011), + &UART_OPS_NAME(scif), &UART_OPS_NAME(scifa), &UART_OPS_NAME(xuartps), NULL -- 2.17.1 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. 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