Update. Got the jailhouse enabled but still getting the pci error. nitializing Jailhouse hypervisor v0.12 (324-ge57d1eff-dirty) on CPU 3 Code location: 0x0000ffffc0200800 Page pool usage after early setup: mem 39/993, remap 0/131072 Initializing processors: CPU 3... OK CPU 2... OK CPU 0... OK CPU 1... OK Initializing unit: irqchip Initializing unit: ARM SMMU v3 Initializing unit: ARM SMMU Initializing unit: PVU IOMMU Initializing unit: PCI Adding virtual PCI device 00:00.0 to cell "k3-am62p5-sk" Adding virtual PCI device 00:01.0 to cell "k3-am62p5-sk" Page pool usage after late setup: mem 79/993, remap 144/131072 Activating hypervisor [ 332.417442] pci-host-generic 76000000.pci: host bridge /pci@0 ranges: [ 332.417476] pci-host-generic 76000000.pci: MEM 0x0076100000..0x0076103fff -> 0x0076100000 [ 332.417572] pci-host-generic 76000000.pci: ECAM at [mem 0x76000000-0x760fffff] for [bus 00] [ 332.417732] pci-host-generic 76000000.pci: PCI host bridge to bus 0001:00 [ 332.417741] pci_bus 0001:00: root bus resource [bus 00] [ 332.417748] pci_bus 0001:00: root bus resource [mem 0x76100000-0x76103fff] [ 332.417793] pci 0001:00:00.0: [110a:4106] type 00 class 0xff0000 [ 332.417819] pci 0001:00:00.0: reg 0x10: [mem 0x00000000-0x0000ffff] [ 332.418103] pci 0001:00:01.0: [110a:4106] type 00 class 0xff0001 [ 332.418127] pci 0001:00:01.0: reg 0x10: [mem 0x00000000-0x0000ffff] [ 332.420175] pci 0001:00:00.0: BAR 0: no space for [mem size 0x00010000] [ 332.420195] pci 0001:00:00.0: BAR 0: failed to assign [mem size 0x00010000] [ 332.420203] pci 0001:00:01.0: BAR 0: no space for [mem size 0x00010000] [ 332.420209] pci 0001:00:01.0: BAR 0: failed to assign [mem size 0x00010000] [ 332.420916] The Jailhouse is opening. [ 332.531915] psci: CPU1 killed (polled 0 ms) [ 332.579879] psci: CPU2 killed (polled 0 ms) [ 332.631860] psci: CPU3 killed (polled 0 ms)
On Tuesday, November 21, 2023 at 12:50:49 AM UTC+5:30 Paresh Bhagat wrote: > Any fix for the following error while trying to enable jailhouse ? > something wrong with the memory allocation? > > Initializing Jailhouse hypervisor v0.12 (324-ge57d1eff-dirty) on CPU 0 > Code location: 0x0000ffffc0200800 > Page pool usage after early setup: mem 39/993, remap 0/131072 > Initializing processors: > CPU 0... OK > CPU 2... OK > CPU 1... OK > CPU 3... OK > Initializing unit: irqchip > Initializing unit: ARM SMMU v3 > Initializing unit: ARM SMMU > Initializing unit: PVU IOMMU > Initializing unit: PCI > Adding virtual PCI device 00:00.0 to cell "k3-am62p5-sk" > Adding virtual PCI device 00:01.0 to cell "k3-am62p5-sk" > Page pool usage after late setup: mem 78/993, remap 144/131072 > Activating hypervisor > [ 122.542841] pci-host-generic 76000000.pci: host bridge /pci@0 ranges: > [ 122.542873] pci-host-generic 76000000.pci: MEM > 0x0076100000..0x0076103fff -> 0x0076100000 > [ 122.542947] pci-host-generic 76000000.pci: ECAM at [mem > 0x76000000-0x760fffff] for [bus 00] > [ 122.543103] pci-host-generic 76000000.pci: PCI host bridge to bus > 0001:00 > [ 122.543112] pci_bus 0001:00: root bus resource [bus 00] > [ 122.543119] pci_bus 0001:00: root bus resource [mem > 0x76100000-0x76103fff] > root@am62pxx-evm:/usr/share/jailhouse# [ 122.543161] pci 0001:00:00.0: > [110a:4106] type 00 class 0xff0000 > [ 122.543187] pci 0001:00:00.0: reg 0x10: [mem 0x00000000-0x0000ffff] > [ 122.543455] pci 0001:00:01.0: [110a:4106] type 00 class 0xff0001 > [ 122.543481] pci 0001:00:01.0: reg 0x10: [mem 0x00000000-0x0000ffff] > [ 122.545437] pci 0001:00:00.0: BAR 0: no space for [mem size 0x00010000] > [ 122.545458] pci 0001:00:00.0: BAR 0: failed to assign [mem size > 0x00010000] > [ 122.545466] pci 0001:00:01.0: BAR 0: no space for [mem size 0x00010000] > [ 122.545471] pci 0001:00:01.0: BAR 0: failed to assign [mem size > 0x00010000] > [ 122.545896] The Jailhouse is opening. > Unhandled data read at 0xb00328(4) > FATAL: unhandled trap (exception class 0x24) > > i have attached root cell config and output of cat /proc/iomem for > referrence. > > Thanks > -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/261c0edb-f0a7-4384-a300-8a0567c16f8dn%40googlegroups.com.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Copyright (c) 2022 Texas Instruments Incorporated - http://www.ti.com/ * * Configuration for K3 based AM62P5 EVM * * Authors: * Matt Ranostay <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> struct { struct jailhouse_system header; __u64 cpus[1]; struct jailhouse_memory mem_regions[31]; struct jailhouse_irqchip irqchips[5]; struct jailhouse_pci_device pci_devices[2]; } __attribute__((packed)) config = { .header = { .signature = JAILHOUSE_SYSTEM_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .architecture = JAILHOUSE_ARM64, .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, .hypervisor_memory = { .phys_start = 0x9dfc00000, .size = 0x400000, }, .debug_console = { .address = 0x02800000, .size = 0x1000, .type = JAILHOUSE_CON_TYPE_8250, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, }, .platform_info = { .pci_mmconfig_base = 0x76000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, .pci_domain = 1, .arm = { .gic_version = 3, .gicd_base = 0x01800000, .gicr_base = 0x01880000, .maintenance_irq = 25, }, }, .root_cell = { .name = "k3-am62p5-sk", .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 180 - 32, }, }, .cpus = { 0xf, }, .mem_regions = { /* IVSHMEM shared memory regions for 00:00.0 (demo) */ { .phys_start = 0x9dfa00000, .virt_start = 0x9dfa00000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, { .phys_start = 0x9dfa10000, .virt_start = 0x9dfa10000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* Peer 0 */ { .phys_start = 0x9dfa20000, .virt_start = 0x9dfa20000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* Peer 1 */ { .phys_start = 0x9dfa30000, .virt_start = 0x9dfa30000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, /* Peer 2 */ { .phys_start = 0x9dfa40000, .virt_start = 0x9dfa40000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, /* IVSHMEM shared memory region for 00:01.0 */ JAILHOUSE_SHMEM_NET_REGIONS(0x9dfb00000, 0), { .phys_start = 0x01810000, .virt_start = 0x01810000, .size = 0x00070000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, { .phys_start = 0x018a0000, .virt_start = 0x018a0000, .size = 0x00060000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* RAM */ { .phys_start = 0x80000000, .virt_start = 0x80000000, .size = 0x80000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* RAM */ { .phys_start = 0x880000000, .virt_start = 0x880000000, .size = 0x15fa00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* RAM. Reserved for inmates */ { .phys_start = 0x9e0000000, .virt_start = 0x9e0000000, .size = 0x20000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* ctrl mmr */ { .phys_start = 0x000f0000, .virt_start = 0x000f0000, .size = 0x00030000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPIO */ { .phys_start = 0x00600000, .virt_start = 0x00600000, .size = 0x00002000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* temp */ { .phys_start = 0x00b00000, .virt_start = 0x00b00000, .size = 0x00020000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPU */ { .phys_start = 0x0fd00000, .virt_start = 0x0fd00000, .size = 0x00020000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First peripheral window, 1 of 2 */ { .phys_start = 0x01000000, .virt_start = 0x01000000, .size = 0x00800000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First peripheral window, 2 of 2 */ { .phys_start = 0x01900000, .virt_start = 0x01900000, .size = 0x01229000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Second peripheral window */ { .phys_start = 0x0e000000, .virt_start = 0x0e000000, .size = 0x01d00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Third peripheral window */ { .phys_start = 0x20000000, .virt_start = 0x20000000, .size = 0x0a008000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* OCSRAM */ { .phys_start = 0x70000000, .virt_start = 0x70000000, .size = 0x00010000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* DSS */ { .phys_start = 0x30200000, .virt_start = 0x30200000, .size = 0x00010000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* DMSS */ { .phys_start = 0x48000000, .virt_start = 0x48000000, .size = 0x06400000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* USB */ { .phys_start = 0x31000000, .virt_start = 0x31000000, .size = 0x00050000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* USB */ { .phys_start = 0x31100000, .virt_start = 0x31100000, .size = 0x00050000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* CPSW */ { .phys_start = 0x08000000, .virt_start = 0x08000000, .size = 0x00200000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First Wake Up Domain */ { .phys_start = 0x2b000000, .virt_start = 0x2b000000, .size = 0x00301000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Second Wake Up Domain */ { .phys_start = 0x43000000, .virt_start = 0x43000000, .size = 0x00020000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* MCU Domain Range */ { .phys_start = 0x04000000, .virt_start = 0x04000000, .size = 0x01ff2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, }, .irqchips = { { .address = 0x01800000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 160, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 288, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 416, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 544, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, }, .pci_devices = { /* 0001:00:00.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 1, .bdf = 0 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX_64K, .shmem_regions_start = 0, .shmem_dev_id = 0, .shmem_peers = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, }, /* 0001:00:01.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 1, .bdf = 1 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX_64K, .shmem_regions_start = 5, .shmem_dev_id = 0, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, }, };
