Hello everyone, I have Jailhouse installed on an am62-sk-lp board. I am trying to run the ivshmem-demo on it. PFA the root and non-root cell config file (this file can also be found in the source code, as configs/arm64/k3-am625-sk.c).
I am able to enable Jailhouse with the root cell and create a non-root cell and load the non-root cell with ivshmem-demo. But when I start the non-root cell, I get this error: Unhandled data read at 0x76100000(2) FATAL: unhandled trap (exception class 0x24) Cell state before exception: pc: 0000000000005538 lr: 0000000000004884 spsr: 60000005 EL1 sp: 0000000000007f90 elr: 0000000000005538 esr: 24 1 1400005 x0: 0000000076000000 x1: 0000000000100000 x2: 0000000000000002 x3: 0000000000000705 x4: 0000000000001000 x5: 0000000000001000 x6: 0000000000000000 x7: 0000000000000000 x8: 0000000000000000 x9: 0000000000000000 x10: 0000000000000000 x11: 0000000000000000 x12: 0000000000000000 x13: 0000000000000000 x14: 0000000000000000 x15: 0000000000000000 x16: 0000000000000000 x17: 0000000000000000 x18: 0000000000000000 x19: 0000000000000100 x20: 000000000000ffff x21: 000000000000110a x22: 0000000000004106 x23: 0000000000000100 x24: 0000000000000000 x25: 0000000000000000 x26: 0000000000000000 x27: 0000000000000000 x28: 0000000000000000 x29: 0000000000000000 Parking CPU 2 (Cell: "inmate-demo") I am guessing that the problem lies in the pci_mmconfig_base field in the root cell config file. It is currently set to 0x76000000. When I change the value, the error message doesn't occur. But when I open the other cell using minicom/tio, I don't see any output, so even though there's no error, I don't think the demo is working as expected. Could someone let me know what the problem is? Thanks Suhaas -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/723d9677-0e1e-4111-8573-381896c4940fn%40googlegroups.com.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Copyright (c) 2022 Texas Instruments Incorporated - http://www.ti.com/ * * Configuration for K3 based AM625 EVM * * Authors: * Matt Ranostay <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> struct { struct jailhouse_system header; __u64 cpus[1]; struct jailhouse_memory mem_regions[35]; struct jailhouse_irqchip irqchips[5]; struct jailhouse_pci_device pci_devices[2]; } __attribute__((packed)) config = { .header = { .signature = JAILHOUSE_SYSTEM_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .architecture = JAILHOUSE_ARM64, .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE, .hypervisor_memory = { .phys_start = 0xdfc00000, .size = 0x400000, }, .debug_console = { .address = 0x02800000, .size = 0x1000, .type = JAILHOUSE_CON_TYPE_8250, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, }, .platform_info = { .pci_mmconfig_base = 0x76000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, .pci_domain = 1, .arm = { .gic_version = 3, .gicd_base = 0x01800000, .gicr_base = 0x01880000, .maintenance_irq = 25, }, }, .root_cell = { .name = "k3-am625-sk", .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 180 - 32, }, }, .cpus = { 0xf, }, .mem_regions = { /* IVSHMEM shared memory regions for 00:00.0 (demo) */ { .phys_start = 0xdfa00000, .virt_start = 0xdfa00000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, { .phys_start = 0xdfa10000, .virt_start = 0xdfa10000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* Peer 0 */ { .phys_start = 0xdfa20000, .virt_start = 0xdfa20000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, /* Peer 1 */ { .phys_start = 0xdfa30000, .virt_start = 0xdfa30000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, /* Peer 2 */ { .phys_start = 0xdfa40000, .virt_start = 0xdfa40000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ, }, /* IVSHMEM shared memory region for 00:01.0 */ JAILHOUSE_SHMEM_NET_REGIONS(0xdfb00000, 0), { .phys_start = 0x01810000, .virt_start = 0x01810000, .size = 0x00070000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, { .phys_start = 0x018a0000, .virt_start = 0x018a0000, .size = 0x00060000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* RAM */ { .phys_start = 0x80000000, .virt_start = 0x80000000, .size = 0x5fa00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* RAM. Reserved for inmates */ { .phys_start = 0xe0000000, .virt_start = 0xe0000000, .size = 0x20000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* ctrl mmr */ { .phys_start = 0x000f0000, .virt_start = 0x000f0000, .size = 0x00030000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPIO */ { .phys_start = 0x00600000, .virt_start = 0x00600000, .size = 0x00002000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPU */ { .phys_start = 0x0fd00000, .virt_start = 0x0fd00000, .size = 0x00020000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* TimeSync Router */ { .phys_start = 0x00a40000, .virt_start = 0x00a40000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Wake Up Domain VTM0 */ { .phys_start = 0x00b00000, .virt_start = 0x00b00000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First peripheral window, 1 of 2 */ { .phys_start = 0x01000000, .virt_start = 0x01000000, .size = 0x00800000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First peripheral window, 2 of 2 */ { .phys_start = 0x01900000, .virt_start = 0x01900000, .size = 0x01229000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Second peripheral window */ { .phys_start = 0x0e000000, .virt_start = 0x0e000000, .size = 0x01d00000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Third peripheral window */ { .phys_start = 0x20000000, .virt_start = 0x20000000, .size = 0x0a008000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* OCSRAM */ { .phys_start = 0x70000000, .virt_start = 0x70000000, .size = 0x00010000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* DSS */ { .phys_start = 0x30200000, .virt_start = 0x30200000, .size = 0x00010000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* DMSS */ { .phys_start = 0x48000000, .virt_start = 0x48000000, .size = 0x06400000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* PRUSS-M */ { .phys_start = 0x30040000, .virt_start = 0x30040000, .size = 0x00080000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* USB */ { .phys_start = 0x31000000, .virt_start = 0x31000000, .size = 0x00050000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* USB */ { .phys_start = 0x31100000, .virt_start = 0x31100000, .size = 0x00050000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPMC */ { .phys_start = 0x3b000000, .virt_start = 0x3b000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPMC */ { .phys_start = 0x50000000, .virt_start = 0x50000000, .size = 0x08000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* CPSW */ { .phys_start = 0x08000000, .virt_start = 0x08000000, .size = 0x00200000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* CRYPTO */ { .phys_start = 0x40900000, .virt_start = 0x40900000, .size = 0x0030000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* First Wake Up Domain */ { .phys_start = 0x2b000000, .virt_start = 0x2b000000, .size = 0x00301000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* Second Wake Up Domain */ { .phys_start = 0x43000000, .virt_start = 0x43000000, .size = 0x00020000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* MCU Domain Range */ { .phys_start = 0x04000000, .virt_start = 0x04000000, .size = 0x01ff2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, }, .irqchips = { { .address = 0x01800000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 160, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 288, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 416, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, { .address = 0x01800000, .pin_base = 544, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, }, }, }, .pci_devices = { /* 0001:00:00.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 1, .bdf = 0 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, .shmem_regions_start = 0, .shmem_dev_id = 0, .shmem_peers = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, }, /* 0001:00:01.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 1, .bdf = 1 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, .shmem_regions_start = 5, .shmem_dev_id = 0, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, }, };
