Author: sebastien.lelong
Date: Sat Apr 4 13:24:47 2009
New Revision: 913
Modified:
trunk/sample/16f88_i2c_hw_slave_check_bus.jal
trunk/sample/16f88_i2c_hw_slave_echo.jal
trunk/test/peripheral/i2c/test_i2c_hw_slave_check_bus.jal
trunk/test/peripheral/i2c/test_i2c_hw_slave_echo.jal
Log:
fix/update i2c hw slave API in test
Modified: trunk/sample/16f88_i2c_hw_slave_check_bus.jal
==============================================================================
--- trunk/sample/16f88_i2c_hw_slave_check_bus.jal (original)
+++ trunk/sample/16f88_i2c_hw_slave_check_bus.jal Sat Apr 4 13:24:47 2009
@@ -1,101 +1,100 @@
--- Title: Program to test an i2c bus (using i2c hardware slave)
--- Author: Sebastien Lelong, Copyright (c) 2008-2009, all rights reserved.
--- Adapted-by:
--- Compiler: >=2.4i
---
--- This file is part of jallib (http://jallib.googlecode.com)
--- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
---
--- Description: this is a one shot test program. It's used to check if
--- i2c bus is properly operational. It requires an SSP/i2c enabled PIC
--- --
--- The idea is enable Start/Stop interrupts. When master sends something,
whatever
--- the address, it should produce an interrupt on this slave. As soon as
interrupt
--- is dealt with, a LED is flashing indefinitely (it also slowly blink
when PIC is up)
---
--- Sources:
---
---
--- This file has been generated on 01/27/09 23:07:49, from:
--- * board: board_16f88_js.jal
--- * test : test_i2c_hw_slave_check_bus.jal
---
-
-
-;@jallib section chipdef
--- chip setup
-include 16f88
-
-;--
-;-- This setup assumes a 20 MHz resonator or crystal
-;-- is connected to pins OSC1 and OSC2.
-pragma target OSC HS -- HS crystal or resonator
-pragma target clock 20_000_000 -- oscillator frequency
-pragma target WDT disabled -- no watchdog
-pragma target LVP disabled -- no low-voltage programming
-pragma target CCP1MUX RB3 -- ccp1 pin on B3
-
---
--- This setup uses the internal oscillator
-;pragma target OSC INTOSC_NOCLKOUT -- HS crystal or resonator
-;pragma target clock 8_000_000 -- oscillator frequency
-;pragma target WDT disabled -- no watchdog
-;pragma target LVP disabled -- no low-voltage programming
-;pragma target CCP1MUX RB3 -- ccp1 pin on B3
-;OSCCON_IRCF = 7 -- set prescaler to 1 (8 MHz)
-
-enable_digital_io()
-;@jallib section led
--- LED IO definition
-var bit led is pin_b3
-var bit led_direction is pin_b3_direction
-var bit led2 is pin_b1
-var bit led2_direction is pin_b1_direction
-
--- i2c setup
- -- with Start/Stop interrupts
-const bit i2c_enable_start_stop_interrupts = true
-include i2c_hw_slave
-const SLAVE_ADDRESS = 0x23 -- whatever, it's not important, and can be
- -- different from the
address the master wants
- -- to talk to
--- this init automatically sets global/peripherals interrupts
-i2c_hw_slave_init(SLAVE_ADDRESS)
-
-
--- Main ISR
-procedure i2c_isr() is
- pragma interrupt
- if ! PIR1_SSPIF then
- return
- end if
- -- reset flag
- PIR1_SSPIF = false
- -- tmp store SSPSTAT and mask out unimportant bit
- var byte tmpstat
- tmpstat = SSPSTAT
- -- check start signals
- if (tmpstat == 0b_1000) then
- -- If we get there, this means this is an SSP/I2C interrupts
- -- and this means i2c bus is properly operational !!!
- while true loop
- led = on
- _usec_delay(100000)
- led = off
- _usec_delay(100000)
- end loop
- end if
-end procedure
-
--- Blink a little when PIC is up
-led_direction = output
-for 4 loop
- led = on
- _usec_delay(250000)
- led = off
- _usec_delay(250000)
-end loop
-
--- waiting for interrupts
-forever loop
-end loop
+-- Title: Program to test an i2c bus (using i2c hardware slave)
+-- Author: Sebastien Lelong, Copyright (c) 2008-2009, all rights reserved.
+-- Adapted-by:
+-- Compiler: >=2.4i
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description: this is a one shot test program. It's used to check if
+-- i2c bus is properly operational. It requires an SSP/i2c enabled PIC
+-- --
+-- The idea is enable Start/Stop interrupts. When master sends something,
whatever
+-- the address, it should produce an interrupt on this slave. As soon as
interrupt
+-- is dealt with, a LED is flashing indefinitely (it also slowly blink
when PIC is up)
+--
+-- Sources:
+--
+--
+-- This file has been generated on Sat Apr 4 22:18:27 2009, from:
+-- * board: board_16f88_js.jal
+-- * test : test_i2c_hw_slave_check_bus.jal
+--
+
+;@jallib section chipdef
+-- chip setup
+include 16f88
+
+;--
+;-- This setup assumes a 20 MHz resonator or crystal
+;-- is connected to pins OSC1 and OSC2.
+pragma target OSC HS -- HS crystal or resonator
+pragma target clock 20_000_000 -- oscillator frequency
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no low-voltage programming
+pragma target CCP1MUX RB3 -- ccp1 pin on B3
+
+--
+-- This setup uses the internal oscillator
+;pragma target OSC INTOSC_NOCLKOUT -- HS crystal or resonator
+;pragma target clock 8_000_000 -- oscillator frequency
+;pragma target WDT disabled -- no watchdog
+;pragma target LVP disabled -- no low-voltage programming
+;pragma target CCP1MUX RB3 -- ccp1 pin on B3
+;OSCCON_IRCF = 7 -- set prescaler to 1 (8 MHz)
+
+enable_digital_io()
+;@jallib section led
+-- LED IO definition
+var bit led is pin_b3
+var bit led_direction is pin_b3_direction
+var bit led2 is pin_b1
+var bit led2_direction is pin_b1_direction
+
+-- i2c setup
+-- with Start/Stop interrupts
+const bit i2c_enable_start_stop_interrupts = true
+include i2c_hw_slave
+const SLAVE_ADDRESS = 0x23 -- whatever, it's not important, and can be
+ -- different from the
address the master wants
+ -- to talk to
+-- this init automatically sets global/peripherals interrupts
+i2c_hw_slave_init(SLAVE_ADDRESS)
+
+
+-- Main ISR
+procedure i2c_isr() is
+ pragma interrupt
+ if ! PIR1_SSPIF then
+ return
+ end if
+ -- reset flag
+ PIR1_SSPIF = false
+ -- tmp store SSPSTAT and mask out unimportant bit
+ var byte tmpstat
+ tmpstat = SSPSTAT
+ -- check start signals
+ if (tmpstat == 0b_1000) then
+ -- If we get there, this means this is an SSP/I2C interrupts
+ -- and this means i2c bus is properly operational !!!
+ while true loop
+ led = on
+ _usec_delay(100000)
+ led = off
+ _usec_delay(100000)
+ end loop
+ end if
+end procedure
+
+-- Blink a little when PIC is up
+led_direction = output
+for 4 loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+
+-- waiting for interrupts
+forever loop
+end loop
\ No newline at end of file
Modified: trunk/sample/16f88_i2c_hw_slave_echo.jal
==============================================================================
--- trunk/sample/16f88_i2c_hw_slave_echo.jal (original)
+++ trunk/sample/16f88_i2c_hw_slave_echo.jal Sat Apr 4 13:24:47 2009
@@ -1,147 +1,146 @@
--- Title: Test program for i2c hardware slave, stateful implementation
--- Author: Sebastien Lelong, Copyright (c) 2008-2009, all rights reserved.
--- Adapted-by:
--- Compiler: >=2.4i
---
--- This file is part of jallib (http://jallib.googlecode.com)
--- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
---
--- Description: this sample shows how to implements an i2c hardware slave,
--- based in i2c_hw_slave_isr.jal library. Basically, this i2c slave waits
for
--- a byte, and when required, it sends byte + 1 (send "a", you'll get
a "b")
--- --
--- This sample is aimed to be used with *_i2c_hw_master_echo.jal samples,
--- which is the master part.
---
---
---
--- This file has been generated on 01/27/09 23:07:47, from:
--- * board: board_16f88_js.jal
--- * test : test_i2c_hw_slave_echo.jal
---
-
-
-;@jallib section chipdef
--- chip setup
-include 16f88
-
-;--
-;-- This setup assumes a 20 MHz resonator or crystal
-;-- is connected to pins OSC1 and OSC2.
-pragma target OSC HS -- HS crystal or resonator
-pragma target clock 20_000_000 -- oscillator frequency
-pragma target WDT disabled -- no watchdog
-pragma target LVP disabled -- no low-voltage programming
-pragma target CCP1MUX RB3 -- ccp1 pin on B3
-
---
--- This setup uses the internal oscillator
-;pragma target OSC INTOSC_NOCLKOUT -- HS crystal or resonator
-;pragma target clock 8_000_000 -- oscillator frequency
-;pragma target WDT disabled -- no watchdog
-;pragma target LVP disabled -- no low-voltage programming
-;pragma target CCP1MUX RB3 -- ccp1 pin on B3
-;OSCCON_IRCF = 7 -- set prescaler to 1 (8 MHz)
-
-;@jallib section led
--- LED IO definition
-var bit led is pin_b3
-var bit led_direction is pin_b3_direction
-var bit led2 is pin_b1
-var bit led2_direction is pin_b1_direction
-led_direction = output
-
-include i2c_hw_slave
--- this will be the slave address. It looks like:
--- 0b_0101_1100
--- => 0b_0101_110 : 7-bits address
--- => 0 : 8th bit is to specify read or write operation.
--- Value can be anything, it does not matter while init
-const byte SLAVE_ADDRESS = 0x5C
-i2c_hw_slave_init(SLAVE_ADDRESS) -- no START/STOP interrupts
-
--- will store what to send back to master
--- so if we get "a", we need to store "a" + 1
-var byte data
-
-
--- Before including i2c_hw_slave_isr library, several callbacks
--- must be defined (callbacks are procedure which supposed to be defined
--- and be called on appriopriate time)
-
--- Since all those callbacks are called once per state (no other calls
--- in the program), it is suggested to use "pragma inline", to save
--- stack usage
-
-
--- this callback is used when something wrong happened
--- during communication between master and us
-procedure i2c_hw_slave_on_error() is
- pragma inline
- -- Just tell user user something's got wrong
- forever loop
- led = on
- _usec_delay(200000)
- led = off
- _usec_delay(200000)
- end loop
-end procedure
-
-
--- this callback is used when master wants to talk to us
--- and our i2c address has been recognized
-procedure i2c_hw_slave_on_state_1(byte in _trash) is
- pragma inline
- -- _trash is read from master, but it's a dummy data
- -- usually (always ?) ignored
-end procedure
-
-
--- This callback is used when master sends a data byte
-procedure i2c_hw_slave_on_state_2(byte in rcv) is
- pragma inline
- -- ultimate data processing... :)
- data = rcv + 1
-end procedure
-
-
--- this callback is used when master wants to read something
--- from us. It should use i2c_hw_slave_write() to send something
-procedure i2c_hw_slave_on_state_3() is
- pragma inline
- i2c_hw_slave_write_i2c(data)
-end procedure
-
-
--- this callback is used when master, after having read something,
--- still wants to read and get data from us.
-procedure i2c_hw_slave_on_state_4() is
- pragma inline
- -- This shouldn't occur in our i2c echo example
- i2c_hw_slave_on_error()
-end procedure
-
-
--- this callback is used when master does not want to talk
--- with us anymore... This is an appropriate place to reset
--- data for instance
-procedure i2c_hw_slave_on_state_5() is
- pragma inline
- data = 0
-end procedure
-
-
--- callbacks are defined, now include ISR
-include i2c_hw_slave_isr
-
--- blink a little to tell the world we're up
-for 4 loop
- led = on
- _usec_delay(100000)
- led = off
- _usec_delay(100000)
-end loop
-
--- just loop until interrupt is raised
-forever loop
-end loop
+-- Title: Test program for i2c hardware slave, stateful implementation
+-- Author: Sebastien Lelong, Copyright (c) 2008-2009, all rights reserved.
+-- Adapted-by: Joep Suijs
+-- Compiler: >=2.4i
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description: this sample shows how to implements an i2c hardware slave,
+-- based in i2c_hw_slave_isr.jal library. Basically, this i2c slave waits
for
+-- a byte, and when required, it sends byte + 1 (send "a", you'll get
a "b")
+-- --
+-- This sample is aimed to be used with *_i2c_hw_master_echo.jal samples,
+-- which is the master part.
+--
+--
+--
+-- This file has been generated on Sat Apr 4 22:18:33 2009, from:
+-- * board: board_16f88_js.jal
+-- * test : test_i2c_hw_slave_echo.jal
+--
+
+;@jallib section chipdef
+-- chip setup
+include 16f88
+
+;--
+;-- This setup assumes a 20 MHz resonator or crystal
+;-- is connected to pins OSC1 and OSC2.
+pragma target OSC HS -- HS crystal or resonator
+pragma target clock 20_000_000 -- oscillator frequency
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no low-voltage programming
+pragma target CCP1MUX RB3 -- ccp1 pin on B3
+
+--
+-- This setup uses the internal oscillator
+;pragma target OSC INTOSC_NOCLKOUT -- HS crystal or resonator
+;pragma target clock 8_000_000 -- oscillator frequency
+;pragma target WDT disabled -- no watchdog
+;pragma target LVP disabled -- no low-voltage programming
+;pragma target CCP1MUX RB3 -- ccp1 pin on B3
+;OSCCON_IRCF = 7 -- set prescaler to 1 (8 MHz)
+
+;@jallib section led
+-- LED IO definition
+var bit led is pin_b3
+var bit led_direction is pin_b3_direction
+var bit led2 is pin_b1
+var bit led2_direction is pin_b1_direction
+led_direction = output
+
+include i2c_hw_slave
+-- this will be the slave address. It looks like:
+-- 0b_0101_1100
+-- => 0b_0101_110 : 7-bits address
+-- => 0 : 8th bit is to specify read or write operation.
+-- Value can be anything, it does not matter while init
+const byte SLAVE_ADDRESS = 0x5C
+i2c_hw_slave_init(SLAVE_ADDRESS)
+
+-- will store what to send back to master
+-- so if we get "a", we need to store "a" + 1
+var byte data
+
+
+-- Before including i2c_hw_slave_isr library, several callbacks
+-- must be defined (callbacks are procedure which supposed to be defined
+-- and be called on appriopriate time)
+
+-- Since all those callbacks are called once per state (no other calls
+-- in the program), it is suggested to use "pragma inline", to save
+-- stack usage
+
+
+-- this callback is used when something wrong happened
+-- during communication between master and us
+procedure i2c_hw_slave_on_error() is
+ pragma inline
+ -- Just tell user user something's got wrong
+ forever loop
+ led = on
+ _usec_delay(200000)
+ led = off
+ _usec_delay(200000)
+ end loop
+end procedure
+
+
+-- this callback is used when master wants to talk to us
+-- and our i2c address has been recognized
+procedure i2c_hw_slave_on_state_1(byte in _trash) is
+ pragma inline
+ -- _trash is read from master, but it's a dummy data
+ -- usually (always ?) ignored
+end procedure
+
+
+-- This callback is used when master sends a data byte
+procedure i2c_hw_slave_on_state_2(byte in rcv) is
+ pragma inline
+ -- ultimate data processing... :)
+ data = rcv + 1
+end procedure
+
+
+-- this callback is used when master wants to read something
+-- from us. It should use i2c_hw_slave_write() to send something
+procedure i2c_hw_slave_on_state_3() is
+ pragma inline
+ i2c_hw_slave_write_i2c(data)
+end procedure
+
+
+-- this callback is used when master, after having read something,
+-- still wants to read and get data from us.
+procedure i2c_hw_slave_on_state_4() is
+ pragma inline
+ -- This shouldn't occur in our i2c echo example
+ i2c_hw_slave_on_error()
+end procedure
+
+
+-- this callback is used when master does not want to talk
+-- with us anymore... This is an appropriate place to reset
+-- data for instance
+procedure i2c_hw_slave_on_state_5() is
+ pragma inline
+ data = 0
+end procedure
+
+
+-- callbacks are defined, now include ISR
+include i2c_hw_slave_isr
+
+-- blink a little to tell the world we're up
+for 4 loop
+ led = on
+ _usec_delay(100000)
+ led = off
+ _usec_delay(100000)
+end loop
+
+-- just loop until interrupt is raised
+forever loop
+end loop
\ No newline at end of file
Modified: trunk/test/peripheral/i2c/test_i2c_hw_slave_check_bus.jal
==============================================================================
--- trunk/test/peripheral/i2c/test_i2c_hw_slave_check_bus.jal (original)
+++ trunk/test/peripheral/i2c/test_i2c_hw_slave_check_bus.jal Sat Apr 4
13:24:47 2009
@@ -22,12 +22,14 @@
;@jallib use led
-- i2c setup
+-- with Start/Stop interrupts
+const bit i2c_enable_start_stop_interrupts = true
include i2c_hw_slave
const SLAVE_ADDRESS = 0x23 -- whatever, it's not important, and can be
-- different from the
address the master wants
-- to talk to
-- this init automatically sets global/peripherals interrupts
-i2c_hw_slave_init(SLAVE_ADDRESS,true) -- with Start/Stop interrupts
+i2c_hw_slave_init(SLAVE_ADDRESS)
-- Main ISR
Modified: trunk/test/peripheral/i2c/test_i2c_hw_slave_echo.jal
==============================================================================
--- trunk/test/peripheral/i2c/test_i2c_hw_slave_echo.jal (original)
+++ trunk/test/peripheral/i2c/test_i2c_hw_slave_echo.jal Sat Apr 4
13:24:47 2009
@@ -27,7 +27,7 @@
-- => 0 : 8th bit is to specify read or write operation.
-- Value can be anything, it does not matter while init
const byte SLAVE_ADDRESS = 0x5C
-i2c_hw_slave_init(SLAVE_ADDRESS,false) -- no START/STOP interrupts
+i2c_hw_slave_init(SLAVE_ADDRESS)
-- will store what to send back to master
-- so if we get "a", we need to store "a" + 1
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