Author: sebastien.lelong
Date: Sat Jun 6 06:41:29 2009
New Revision: 1031
Modified:
trunk/include/peripheral/adc/adc.jal
trunk/include/peripheral/adc/adc_pindef.jal
trunk/tools/adc/adc_an_grp.py
trunk/tools/adc/adc_pins.py
trunk/tools/pinmap.py
Log:
implement left/right justify, fix 5 missing PICs: 16F677, 16F685, 16F687,
16F689 and 16F690
Modified: trunk/include/peripheral/adc/adc.jal
==============================================================================
--- trunk/include/peripheral/adc/adc.jal (original)
+++ trunk/include/peripheral/adc/adc.jal Sat Jun 6 06:41:29 2009
@@ -54,7 +54,7 @@
-- sanity check
if ADC_HIGH_RESOLUTION & ! defined(ADRESH) then
- _warn "This pic does not seem to handle 10-bits ADC"
+ _warn "This PIC does not seem to handle 10-bits ADC"
end if
-- local variables
@@ -159,18 +159,34 @@
procedure _adc_init_justify() is
- -- TODO: jallibize this !
+ -- Seb: justification is done through ADFM bits
+ -- They can be found in:
+ -- - ADCON0_ADFM
+ -- - ADCON1_ADFM
+ -- - ADCON2_ADFM
+ --
+ -- When true (1), it's right justified: the 6 MSb of ADRESH are read
as '0'
+ -- When false (0), it's left justified: the 6 LSb of ADRESL are read
as '0'
+ --
+ -- The choice here is kept from Stef's logic:
+ -- - if high resolution, right justified, read H + L
+ -- - if low resolution, left justified, only read H
+
+ -- first normalize ADFM bit
+ if defined(ADCON0_ADFM) == true then
+ var volatile bit JALLIB_ADFM is ADCON0_ADFM
+ elsif defined(ADCON1_ADFM) == true then
+ var volatile bit JALLIB_ADFM is ADCON1_ADFM
+ elsif defined(ADCON2_ADFM) == true then
+ var volatile bit JALLIB_ADFM is ADCON2_ADFM
+ else
+ _err "Couldn't found ADFM bits, report this error !"
+ end if
- -- if high resolution, right justified, read H + L
- -- if low resolution, left justified, only read H
- if target_chip == PIC_12F675 then
- if ADC_HIGH_RESOLUTION then
- _adcon0_shadow = _adcon0_shadow | 0x80
- end if
+ if ADC_HIGH_RESOLUTION == true then
+ JALLIB_ADFM = 1
else
- if ADC_HIGH_RESOLUTION then
- ADCON1 = ADCON1 | 0x80
- end if
+ JALLIB_ADFM = 0
end if
end procedure
Modified: trunk/include/peripheral/adc/adc_pindef.jal
==============================================================================
--- trunk/include/peripheral/adc/adc_pindef.jal (original)
+++ trunk/include/peripheral/adc/adc_pindef.jal Sat Jun 6 06:41:29 2009
@@ -1168,7 +1168,7 @@
-- RC6 <-> AN8
-- RC7 <-> AN9
--
-if target_chip == PIC_18LF13K22 | target_chip == PIC_16HV785 | target_chip
== PIC_18F13K22 | target_chip == PIC_18LF14K22 | target_chip ==
PIC_18F14K22 | target_chip == PIC_16F785 then
+if target_chip == PIC_18LF13K22 | target_chip == PIC_16HV785 | target_chip
== PIC_18F13K22 | target_chip == PIC_18LF14K22 | target_chip ==
PIC_18F14K22 | target_chip == PIC_16F785 | target_chip == PIC_16F690 |
target_chip == PIC_16F687 | target_chip == PIC_16F689 | target_chip ==
PIC_16F685 | target_chip == PIC_16F677 then
const byte ADC_NTOTAL_CHANNEL = 12
const byte JALLIB_ADC_GRP = 28
Modified: trunk/tools/adc/adc_an_grp.py
==============================================================================
--- trunk/tools/adc/adc_an_grp.py (original)
+++ trunk/tools/adc/adc_an_grp.py Sat Jun 6 06:41:29 2009
@@ -242,7 +242,12 @@
'18F13K22',
'18LF14K22',
'18F14K22',
-
'16F785'],
+
'16F785',
+
'16F690',
+
'16F687',
+
'16F689',
+
'16F685',
+
'16F677'],
(('RA0', 'AN0'), ('RA1', 'AN1'), ('RA2', 'AN2'), ('RA4', 'AN3'),
('RC0', 'AN4'), ('RC1', 'AN5'), ('RC2', 'AN6'), ('RC3', 'AN7')): ['16F688',
'16F684'],
(('RA0', 'AN0'), ('RA1', 'AN1'), ('RA4', 'AN2')): ['18F1230', '18F1330'],
Modified: trunk/tools/adc/adc_pins.py
==============================================================================
--- trunk/tools/adc/adc_pins.py (original)
+++ trunk/tools/adc/adc_pins.py Sat Jun 6 06:41:29 2009
@@ -10,6 +10,18 @@
'16F628': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F628A': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F648A': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
+ '16F677': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7',
+ 'RC6': 'AN8',
+ 'RC7': 'AN9',
+ 'RB4': 'AN10',
+ 'RB5': 'AN11'},
'16F684': {'RA0': 'AN0',
'RA1': 'AN1',
'RA2': 'AN2',
@@ -18,6 +30,30 @@
'RC1': 'AN5',
'RC2': 'AN6',
'RC3': 'AN7'},
+ '16F685': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7',
+ 'RC6': 'AN8',
+ 'RC7': 'AN9',
+ 'RB4': 'AN10',
+ 'RB5': 'AN11'},
+ '16F687': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7',
+ 'RC6': 'AN8',
+ 'RC7': 'AN9',
+ 'RB4': 'AN10',
+ 'RB5': 'AN11'},
'16F688': {'RA0': 'AN0',
'RA1': 'AN1',
'RA2': 'AN2',
@@ -26,6 +62,30 @@
'RC1': 'AN5',
'RC2': 'AN6',
'RC3': 'AN7'},
+ '16F689': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7',
+ 'RC6': 'AN8',
+ 'RC7': 'AN9',
+ 'RB4': 'AN10',
+ 'RB5': 'AN11'},
+ '16F690': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7',
+ 'RC6': 'AN8',
+ 'RC7': 'AN9',
+ 'RB4': 'AN10',
+ 'RB5': 'AN11'},
'16F716': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F72': {'RA0': 'AN0',
'RA1': 'AN1',
Modified: trunk/tools/pinmap.py
==============================================================================
--- trunk/tools/pinmap.py (original)
+++ trunk/tools/pinmap.py Sat Jun 6 06:41:29 2009
@@ -306,9 +306,9 @@
'RB6': ['RB6'],
'RB7': ['RB7'],
'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
+ 'RC1': ['RC1', 'C12IN1-'],
+ 'RC2': ['RC2', 'C12IN2-'],
+ 'RC3': ['RC3', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5'],
'RC6': ['RC6'],
@@ -365,24 +365,24 @@
'RC3': ['RC3'],
'RC4': ['RC4'],
'RC5': ['RC5']},
- '16F677': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
- 'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
- 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RB4': ['RB4'],
- 'RB5': ['RB5'],
- 'RB6': ['RB6'],
+ '16F677': {'RA0': ['RA0', 'AN0','C1IN+', 'ICSPDAT', 'ULPWU'],
+ 'RA1': ['RA1', 'AN1','C12IN0-', 'VREF','ICSPCLK'],
+ 'RA2': ['RA2', 'AN2','T0CKI', 'INT', 'C1OUT'],
+ 'RA3': ['RA3', 'MCLR', 'VPP'],
+ 'RA4': ['RA4', 'AN3','T1G', 'OSC2', 'CLKOUT'],
+ 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
+ 'RB4': ['RB4','AN10','SDI','SDA'],
+ 'RB5': ['RB5','AN11'],
+ 'RB6': ['RB6','SCK','SCL'],
'RB7': ['RB7'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
+ 'RC0': ['RC0','AN4', 'C2IN+'],
+ 'RC1': ['RC1','AN5','C12IN1-'],
+ 'RC2': ['RC2','AN6', 'C12IN2-'],
+ 'RC3': ['RC3','AN7', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5'],
- 'RC6': ['RC6'],
- 'RC7': ['RC7']},
+ 'RC6': ['RC6','AN8','SS'],
+ 'RC7': ['RC7','AN9','SDO']},
'16F684': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
'RA1': ['RA1', 'AN1', 'C1IN-', 'VREF', 'ICSPCLK'],
'RA2': ['RA2', 'AN2', 'T0CKI', 'INT', 'C1OUT'],
@@ -395,42 +395,42 @@
'RC3': ['RC3', 'AN7', 'P1C'],
'RC4': ['RC4', 'C2OUT', 'P1B'],
'RC5': ['RC5', 'CCP1', 'P1A']},
- '16F685': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
- 'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
- 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RB4': ['RB4'],
- 'RB5': ['RB5'],
- 'RB6': ['RB6'],
- 'RB7': ['RB7'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
- 'RC4': ['RC4', 'C2OUT'],
- 'RC5': ['RC5'],
- 'RC6': ['RC6'],
- 'RC7': ['RC7']},
- '16F687': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
+ '16F685': {'RA0': ['RA0','AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
+ 'RA1': ['RA1','AN1', 'C12IN0-', 'VREF','ICSPCLK'],
+ 'RA2': ['RA2','AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['RA4', 'AN3','T1G', 'OSC2', 'CLKOUT'],
'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RB4': ['RB4'],
- 'RB5': ['RB5'],
+ 'RB4': ['RB4','AN10'],
+ 'RB5': ['RB5','AN11'],
'RB6': ['RB6'],
'RB7': ['RB7'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
- 'RC4': ['RC4', 'C2OUT'],
+ 'RC0': ['RC0','AN4', 'C2IN+'],
+ 'RC1': ['RC1','AN5', 'C12IN1-'],
+ 'RC2': ['RC2','AN6', 'C12IN2-'],
+ 'RC3': ['RC3','AN7', 'C12IN3-'],
+ 'RC4': ['RC4', 'C2OUT','P1B'],
+ 'RC5': ['RC5','CCP1','P1A'],
+ 'RC6': ['RC6','AN8'],
+ 'RC7': ['RC7','AN9']},
+ '16F687': {'RA0': ['RA0','AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
+ 'RA1': ['RA1','AN1', 'C12IN0-', 'VREF','ICSPCLK'],
+ 'RA2': ['RA2','AN2', 'T0CKI', 'INT', 'C1OUT'],
+ 'RA3': ['RA3', 'MCLR', 'VPP'],
+ 'RA4': ['RA4', 'AN3','T1G', 'OSC2', 'CLKOUT'],
+ 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
+ 'RB4': ['RB4','AN10','SDI','SDA'],
+ 'RB5': ['RB5','AN11','RX','DT'],
+ 'RB6': ['RB6','SCK','SCL'],
+ 'RB7': ['RB7','TX','CK'],
+ 'RC0': ['RC0','AN4', 'C2IN+'],
+ 'RC1': ['RC1','AN5', 'C12IN1-'],
+ 'RC2': ['RC2','AN6', 'C12IN2-'],
+ 'RC3': ['RC3','AN7', 'C12IN3-'],
+ 'RC4': ['RC4', 'C2OUT',],
'RC5': ['RC5'],
- 'RC6': ['RC6'],
- 'RC7': ['RC7']},
+ 'RC6': ['RC6','AN8','SS'],
+ 'RC7': ['RC7','AN9','SDO']},
'16F688': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
'RA1': ['RA1', 'AN1', 'C1IN-', 'VREF', 'ICSPCLK'],
'RA2': ['RA2', 'AN2', 'T0CKI', 'INT', 'C1OUT'],
@@ -443,42 +443,42 @@
'RC3': ['RC3', 'AN7'],
'RC4': ['RC4', 'C2OUT', 'TX', 'CK'],
'RC5': ['RC5', 'RX', 'DT']},
- '16F689': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
- 'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
- 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RB4': ['RB4'],
- 'RB5': ['RB5'],
- 'RB6': ['RB6'],
- 'RB7': ['RB7'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
- 'RC4': ['RC4', 'C2OUT'],
- 'RC5': ['RC5'],
- 'RC6': ['RC6'],
- 'RC7': ['RC7']},
- '16F690': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
+ '16F689': {'RA0': ['RA0','AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
+ 'RA1': ['RA1','AN1', 'C12IN0-', 'VREF','ICSPCLK'],
+ 'RA2': ['RA2','AN2', 'T0CKI', 'INT', 'C1OUT'],
+ 'RA3': ['RA3', 'MCLR', 'VPP'],
+ 'RA4': ['RA4', 'AN3','T1G', 'OSC2', 'CLKOUT'],
+ 'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
+ 'RB4': ['RB4','AN10','SDI','SDA'],
+ 'RB5': ['RB5','AN11','RX','DT'],
+ 'RB6': ['RB6','SCK','SCL'],
+ 'RB7': ['RB7','TX','CK'],
+ 'RC0': ['RC0','AN4', 'C2IN+'],
+ 'RC1': ['RC1','AN5', 'C12IN1-'],
+ 'RC2': ['RC2','AN6', 'C12IN2-'],
+ 'RC3': ['RC3','AN7', 'C12IN3-'],
+ 'RC4': ['RC4', 'C2OUT',],
+ 'RC5': ['RC5'],
+ 'RC6': ['RC6','AN8','SS'],
+ 'RC7': ['RC7','AN9','SDO']},
+ '16F690': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
+ 'RA1': ['RA1', 'AN1', 'C12IN0-', 'ICSPCLK'],
+ 'RA2': ['RA2', 'AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['RA4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RB4': ['RB4'],
- 'RB5': ['RB5'],
- 'RB6': ['RB6'],
- 'RB7': ['RB7'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2RB4'],
- 'RC3': ['RC3', 'C12IN3'],
- 'RC4': ['RC4', 'C2OUT'],
- 'RC5': ['RC5'],
- 'RC6': ['RC6'],
- 'RC7': ['RC7']},
+ 'RB4': ['RB4', 'AN10','SDI','SDA'],
+ 'RB5': ['RB5', 'AN11','RX','DT'],
+ 'RB6': ['RB6', 'SCK','SCL'],
+ 'RB7': ['RB7','TX','CK'],
+ 'RC0': ['RC0','AN4', 'C2IN+'],
+ 'RC1': ['RC1','AN5', 'C12IN1-'],
+ 'RC2': ['RC2','AN6', 'C12IN2-','P1D'],
+ 'RC3': ['RC3','AN7', 'C12IN3-','P1C'],
+ 'RC4': ['RC4', 'C2OUT','P1B'],
+ 'RC5': ['RC5','CCP1','P1A'],
+ 'RC6': ['RC6','AN8','SS'],
+ 'RC7': ['RC7','AN9','SDO']},
'16F716': {'RA0': ['RA0', 'AN0'],
'RA1': ['RA1', 'AN1'],
'RA2': ['RA2', 'AN2'],
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