Hi Seb, I can test 16f877a, 16f648 and 16f73 if you're not in a hurry.
Joep 2009/6/8 Sebastien Lelong <[email protected]>: > Hi guys, > > > Big time ! After several weeks (months ?) re-writing ADC libraries, > something like 3400 lines of code (ok most are generated...) I ran my first > test this morning with my faithful 16f88, and this was a success ! Glad I > am... This test is very simple, see 16f88_adc_lowres.jal: using first > digital pin (AN0), low resolution. But that's a good start ! > > Time to test for other PICs, I need your help here ! During my quest in the > land of ADC, I've identified distinct groups of PICs behaving the same. I'd > like to perform tests at least with one representative PIC of each group. > Thoses groups are mostly defined by the way analog pins are configured. See > adc_channels.jal:FG bits > > > FIRST CASE: > - PCFG bits exist, > - analog pins are *dependent* from each other: you can't choose which pin > will act as analog, it's a fixed combination. You need to define > ADC_NCHANNEL, the total number of ADC channels you want, including Vref > pins. > - Vref config is done via PCFG bits combination > > PICs: 18F6585, 18F6680, 18F8585, 18F8680, 16F870, 16F871, 16F73, 16F74, > 16F76, 16F77, 16F737, 16F747, 16F767, 16F777, 16F72, 16F873A, 16F874A, > 16F876A, 16F877A, 16F716, 18F2439, 18F2539, 18F4439, 18F4539, 16F873, > 16F874, 16F876, 16F877, 16F872, 16F818, 16F819 > > > SECOND CASE: > - PCFG bits exist > - analog are *independent* from each other: you can specifically select > which pin will act as analog, defining your own combination. This require > the use of a new procedure: set_analog_pin(channel) (and its friend > set_digital_pin(), reversing the setting). Using ADC_NCHANNEL here is not > allowed. > - Vref config is done via VCFG bits > > PICs (only 18F): 18F24J11, 18F24J50, 18F25J11, 18F25J50, 18F26J11, 18F26J50, > 18F44J11, 18F44J50, 18F45J11, 18F45J50, 18F46J11, 18F46J50, 18LF24J11, > 18LF24J50, 18LF25J11, 18LF25J50, 18LF26J11, 18LF26J50, 18LF44J11, 18LF44J50, > 18LF45J11, 18LF45J50, 18LF46J11, 18LF46J50 > > > THIRD CASE: > - ANS bits exist, > - analog are independent from each other. Same comments as in second case. > - Vref config is done via VCFG bits > > PICs: 10F220, 10F222, 12F510, 12F609, 12F615, 12F675, 12F683, 12HV609, > 12HV615, 16F506, 16F526, 16F610, 16F616, 16F676, 16F677, 16F684, 16F685, > 16F687, 16F688, 16F689, 16F690, 16F722, 16F723, 16F724, 16F726, 16F727, > 16F785, 16F88, 16F882, 16F883, 16F884, 16F886, 16F887, 16HV610, 16HV616, > 16HV785, 16LF722, 16LF723, 16LF724, 16LF726, 16LF727, 18F13K22, 18F13K50, > 18F14K22, 18F14K50, 18F23K20, 18F24K20, 18F25K20, 18F26K20, 18F43K20, > 18F44K20, 18F45K20, 18F46K20, 18LF13K22, 18LF13K50, 18LF14K22, 18LF14K50 > > > There are other parameters, like how clock selection is configured. This was > the problem Carlo originally reported. This setting is quite critical, > because it has direct impact on the acquisition delay computation.Some PICs > use: > > - bit*2 ADCS > - bit*2 ADCS + bit ADCS2 > - bit*3 ADCS > > Ideally, testing each of these would be great. > > > So, can you guys tell me which PICs you're ready to use ? I'll then design > and send you some tests. In the mean time, I'll perform more tests on my > 16f88, like high resolution, testing all analog pins, etc... I'll also test > Rob's modifications in device files about CHS bits set in a pseudo-variable > (sorry Rob, did not have time to test this yet). > > > Thanks for your help. > Cheers, > Seb > -- > Sébastien Lelong > http://www.sirloon.net > http://sirbot.org > > > > --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
