Author: sebastien.lelong
Date: Sat Jul 4 10:19:10 2009
New Revision: 1079
Modified:
trunk/tools/adc/adc_an_grp.py
trunk/tools/adc/adc_pins.py
trunk/tools/adc/vref_pins.py
trunk/tools/pinmap.py
trunk/tools/pinmap_pinsuffix.py
Log:
update/fix pinmap for 12F615, 12F675, 12HV615, 16F616, 16F676, 16F87,
16F88, 16HV616
Modified: trunk/tools/adc/adc_an_grp.py
==============================================================================
--- trunk/tools/adc/adc_an_grp.py (original)
+++ trunk/tools/adc/adc_an_grp.py Sat Jul 4 10:19:10 2009
@@ -6,9 +6,13 @@
'16F627',
'16F628A',
'16F716',
+ '16F87',
'16F627A'],
(('RA4', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1')): ['18F1330', '18F1230'],
- (('RA4', 'AN3'), ('RA2', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1')):
['12F683'],
+ (('RA4', 'AN3'), ('RA2', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1')):
['12F615',
+ '12F675',
+ '12F683',
+ '12HV615'],
(('RA4', 'AN4'), ('RA2', 'AN2'), ('RA3', 'AN3'), ('RA0', 'AN0'),
('RA1', 'AN1')): ['16F819',
'16F818',
'18F2331',
@@ -32,11 +36,11 @@
'18F242'],
(('RB2', 'AN2'), ('RB1', 'AN1'), ('RB0', 'AN0')): ['16F526', '16F506'],
(('RB3', 'AN9'), ('RB2', 'AN8'), ('RB1', 'AN10'), ('RB0', 'AN12'),
('RA5', 'AN4'), ('RA2', 'AN2'), ('RA3', 'AN3'), ('RA0', 'AN0'),
('RA1', 'AN1'), ('RC2', 'AN11')): ['18F24J11',
-
'18LF24J50',
'18F24J50',
'18F25J50',
'18F26J11',
'18LF26J50',
+
'18LF24J50',
'18LF25J50',
'18LF24J11',
'18F25J11',
@@ -130,9 +134,11 @@
'16F882',
'16F737',
'16F767'],
- (('RB7', 'AN6'), ('RB6', 'AN5'), ('RA4', 'AN4'), ('RA2', 'AN2'),
('RA3', 'AN3'), ('RA0', 'AN0'), ('RA1', 'AN1')): ['16F88',
-
'16F87'],
- (('RC0', 'AN4'), ('RC1', 'AN5'), ('RC2', 'AN6'), ('RC3', 'AN7'),
('RA4', 'AN3'), ('RA2', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1')): ['16F684',
+ (('RB7', 'AN6'), ('RB6', 'AN5'), ('RA4', 'AN4'), ('RA2', 'AN2'),
('RA3', 'AN3'), ('RA0', 'AN0'), ('RA1', 'AN1')): ['16F88'],
+ (('RC0', 'AN4'), ('RC1', 'AN5'), ('RC2', 'AN6'), ('RC3', 'AN7'),
('RA4', 'AN3'), ('RA2', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1')): ['16HV616',
+
'16F684',
+
'16F616',
+
'16F676',
'16F688'],
(('RC7', 'AN9'), ('RB5', 'AN11'), ('RB4', 'AN10'), ('RC0', 'AN4'),
('RC1', 'AN5'), ('RC2', 'AN6'), ('RC3', 'AN7'), ('RA4', 'AN3'),
('RA2', 'AN2'), ('RA0', 'AN0'), ('RA1', 'AN1'), ('RC6', 'AN8')):
['18LF14K22',
'18LF13K22',
@@ -201,12 +207,12 @@
'18F6527',
'18F6723',
'18F6722',
+
'18F8490',
'18F6680',
'18F6585',
'18F6720',
'18F8410',
'18F6410',
-
'18F8490',
'18F6628',
'18F6622',
'18F6620',
@@ -246,10 +252,10 @@
'18F86J10',
'18F85J15',
'18F85J10',
-
'18F86J65',
'18F86J60',
'18F87J10',
-
'18F87J60'],
+
'18F87J60',
+
'18F86J65'],
(('RF3', 'AN8'), ('RF2', 'AN7'), ('RF1', 'AN6'), ('RF7', 'AN5'),
('RF6', 'AN11'), ('RF5', 'AN10'), ('RF4', 'AN9'), ('RA5', 'AN4'),
('RA2', 'AN2'), ('RA3', 'AN3'), ('RA0', 'AN0'), ('RA1', 'AN1')):
['18F65J11',
'18F66J90',
'18F66J93',
Modified: trunk/tools/adc/adc_pins.py
==============================================================================
--- trunk/tools/adc/adc_pins.py (original)
+++ trunk/tools/adc/adc_pins.py Sat Jul 4 10:19:10 2009
@@ -2,14 +2,33 @@
{'10F220': {'RA0': 'AN0', 'RA1': 'AN1'},
'10F222': {'RA0': 'AN0', 'RA1': 'AN1'},
'12F510': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2'},
+ '12F615': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA4': 'AN3'},
+ '12F675': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA4': 'AN3'},
'12F683': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA4': 'AN3'},
+ '12HV615': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA4': 'AN3'},
'16F506': {'RB0': 'AN0', 'RB1': 'AN1', 'RB2': 'AN2'},
'16F526': {'RB0': 'AN0', 'RB1': 'AN1', 'RB2': 'AN2'},
+ '16F616': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7'},
'16F627': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F627A': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F628': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F628A': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F648A': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
+ '16F676': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7'},
'16F677': {'RA0': 'AN0',
'RA1': 'AN1',
'RA2': 'AN2',
@@ -220,13 +239,7 @@
'RA2': 'AN2',
'RA3': 'AN3',
'RA4': 'AN4'},
- '16F87': {'RA0': 'AN0',
- 'RA1': 'AN1',
- 'RA2': 'AN2',
- 'RA3': 'AN3',
- 'RA4': 'AN4',
- 'RB6': 'AN5',
- 'RB7': 'AN6'},
+ '16F87': {'RA0': 'AN0', 'RA1': 'AN1', 'RA2': 'AN2', 'RA3': 'AN3'},
'16F870': {'RA0': 'AN0',
'RA1': 'AN1',
'RA2': 'AN2',
@@ -399,6 +412,14 @@
'RE0': 'AN5',
'RE1': 'AN6',
'RE2': 'AN7'},
+ '16HV616': {'RA0': 'AN0',
+ 'RA1': 'AN1',
+ 'RA2': 'AN2',
+ 'RA4': 'AN3',
+ 'RC0': 'AN4',
+ 'RC1': 'AN5',
+ 'RC2': 'AN6',
+ 'RC3': 'AN7'},
'16HV785': {'RA0': 'AN0',
'RA1': 'AN1',
'RA2': 'AN2',
Modified: trunk/tools/adc/vref_pins.py
==============================================================================
--- trunk/tools/adc/vref_pins.py (original)
+++ trunk/tools/adc/vref_pins.py Sat Jul 4 10:19:10 2009
@@ -1,5 +1,7 @@
vref_pins = \
-{'12F683': {'RA1': 'VREF'},
+{'12F675': {'RA1': 'VREF'},
+ '12F683': {'RA1': 'VREF'},
+ '16F616': {'RA1': 'VREF'},
'16F627': {'RA2': 'VREF'},
'16F627A': {'RA2': 'VREF'},
'16F628': {'RA2': 'VREF'},
@@ -7,6 +9,7 @@
'16F636': {'RA1': 'VREF'},
'16F639': {'RA1': 'VREF'},
'16F648A': {'RA2': 'VREF'},
+ '16F676': {'RA1': 'VREF'},
'16F677': {'RA1': 'VREF'},
'16F684': {'RA1': 'VREF'},
'16F685': {'RA1': 'VREF'},
@@ -26,7 +29,6 @@
'16F785': {'RA1': 'VREF'},
'16F818': {'RA2': 'VREF', 'RA3': 'VREF+'},
'16F819': {'RA2': 'VREF', 'RA3': 'VREF+'},
- '16F87': {'RA3': 'VREF+'},
'16F870': {'RA2': 'VREF', 'RA3': 'VREF+'},
'16F871': {'RA2': 'VREF', 'RA3': 'VREF+'},
'16F872': {'RA2': 'VREF', 'RA3': 'VREF+'},
@@ -38,7 +40,7 @@
'16F876A': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F877': {'RA2': 'VREF', 'RA3': 'VREF+'},
'16F877A': {'RA2': 'VREF-', 'RA3': 'VREF+'},
- '16F88': {'RA3': 'VREF+'},
+ '16F88': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F882': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F883': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F884': {'RA2': 'VREF-', 'RA3': 'VREF+'},
@@ -49,6 +51,7 @@
'16F916': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F917': {'RA2': 'VREF-', 'RA3': 'VREF+'},
'16F946': {'RA2': 'VREF-', 'RA3': 'VREF+'},
+ '16HV616': {'RA1': 'VREF'},
'16HV785': {'RA1': 'VREF'},
'18F1220': {'RA2': 'VREF', 'RA3': 'VREF+'},
'18F1230': {'RA4': 'VREF+'},
Modified: trunk/tools/pinmap.py
==============================================================================
--- trunk/tools/pinmap.py (original)
+++ trunk/tools/pinmap.py Sat Jul 4 10:19:10 2009
@@ -53,11 +53,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12F615': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN0-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12F615': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN0-', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'12F629': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
'RA1': ['GP1', 'CIN-', 'ICSPCLK'],
@@ -71,11 +71,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12F675': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12F675': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'12F683': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT', 'ULPWU'],
'RA1': ['GP1', 'AN1', 'CIN-', 'VREF', 'ICSPCLK'],
@@ -89,11 +89,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12HV615': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN0-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12HV615': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN0-', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'16F505': {'RB0': ['RB0', 'ICSPDAT'],
'RB1': ['RB1', 'ICSPCLK'],
@@ -207,16 +207,16 @@
'RC3': ['RC3', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5']},
- '16F616': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
+ '16F616': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT'],
+ 'RA1': ['RA1', 'AN1', 'C12IN0-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['RA2', 'AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['RA4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2-'],
- 'RC3': ['RC3', 'C12IN3-'],
+ 'RC0': ['RC0', 'AN4', 'C2IN+'],
+ 'RC1': ['RC1', 'AN5', 'C12IN1'],
+ 'RC2': ['RC2', 'AN6', 'C12IN2-'],
+ 'RC3': ['RC3', 'AN7', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5']},
'16F627': {'RA0': ['RA0', 'AN0'],
@@ -353,16 +353,16 @@
'RB5': ['RB5'],
'RB6': ['RB6', 'T1OSO', 'T1CKI', 'PGC'],
'RB7': ['RB7', 'T1OSI', 'PGD']},
- '16F676': {'RA0': ['RA0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['RA1', 'CIN-', 'ICSPCLK'],
- 'RA2': ['RA2', 'COUT', 'T0CKI', 'INT'],
+ '16F676': {'RA0': ['RA0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['RA1', 'AN1', 'CIN-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['RA2', 'AN2', 'COUT', 'T0CKI', 'INT'],
'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['RA4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': ['RC0'],
- 'RC1': ['RC1'],
- 'RC2': ['RC2'],
- 'RC3': ['RC3'],
+ 'RC0': ['RC0', 'AN4'],
+ 'RC1': ['RC1', 'AN5'],
+ 'RC2': ['RC2', 'AN6'],
+ 'RC3': ['RC3', 'AN7'],
'RC4': ['RC4'],
'RC5': ['RC5']},
'16F677': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
@@ -985,8 +985,8 @@
'16F87': {'RA0': ['RA0', 'AN0'],
'RA1': ['RA1', 'AN1'],
'RA2': ['RA2', 'AN2', 'CVREF'],
- 'RA3': ['RA3', 'AN3', 'VREF+'],
- 'RA4': ['RA4', 'AN4', 'T0CKI'],
+ 'RA3': ['RA3', 'AN3', 'C1OUT'],
+ 'RA4': ['RA4', 'T0CKI', 'C2OUT'],
'RA5': ['RA5', 'MCLR', 'VPP'],
'RA6': ['RA6', 'OSC2', 'CLKO'],
'RA7': ['RA7', 'OSC1', 'CLKI'],
@@ -996,8 +996,8 @@
'RB3': ['RB3', 'PGM', 'CCP1'],
'RB4': ['RB4', 'SCK', 'SCL'],
'RB5': ['RB5', 'SS', 'TX', 'CK'],
- 'RB6': ['RB6', 'AN5', 'PGC'],
- 'RB7': ['RB7', 'AN6', 'PGD']},
+ 'RB6': ['RB6', 'PGC', 'T1OSO', 'T1CKI'],
+ 'RB7': ['RB7', 'PGD', 'T1OSI']},
'16F870': {'RA0': ['RA0', 'AN0'],
'RA1': ['RA1', 'AN1'],
'RA2': ['RA2', 'AN2', 'VREF'],
@@ -1297,9 +1297,9 @@
'RE2': ['RE2', 'CS', 'AN7']},
'16F88': {'RA0': ['RA0', 'AN0'],
'RA1': ['RA1', 'AN1'],
- 'RA2': ['RA2', 'AN2', 'CVREF'],
- 'RA3': ['RA3', 'AN3', 'VREF+'],
- 'RA4': ['RA4', 'AN4', 'T0CKI'],
+ 'RA2': ['RA2', 'AN2', 'CVREF', 'VREF-'],
+ 'RA3': ['RA3', 'AN3', 'VREF+', 'C1OUT'],
+ 'RA4': ['RA4', 'AN4', 'T0CKI', 'C2OUT'],
'RA5': ['RA5', 'MCLR', 'VPP'],
'RA6': ['RA6', 'OSC2', 'CLKO'],
'RA7': ['RA7', 'OSC1', 'CLKI'],
@@ -1309,8 +1309,8 @@
'RB3': ['RB3', 'PGM', 'CCP1'],
'RB4': ['RB4', 'SCK', 'SCL'],
'RB5': ['RB5', 'SS', 'TX', 'CK'],
- 'RB6': ['RB6', 'AN5', 'PGC'],
- 'RB7': ['RB7', 'AN6', 'PGD']},
+ 'RB6': ['RB6', 'AN5', 'PGC', 'T1OSO', 'T1CKI'],
+ 'RB7': ['RB7', 'AN6', 'PGD', 'T1OSI']},
'16F882': {'RA0': ['RA0', 'AN0', 'ULPWU', 'C12IN0'],
'RA1': ['RA1', 'AN1', 'C12IN1'],
'RA2': ['RA2', 'AN2', 'VREF-', 'CVREF', 'C2IN+'],
@@ -1658,16 +1658,16 @@
'RC3': ['RC3', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5']},
- '16HV616': {'RA0': ['RA0', 'C1IN+', 'ICSPDAT'],
- 'RA1': ['RA1', 'C12IN0-', 'ICSPCLK'],
- 'RA2': ['RA2', 'T0CKI', 'INT', 'C1OUT'],
+ '16HV616': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT'],
+ 'RA1': ['RA1', 'AN1', 'C12IN0-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['RA2', 'AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['RA3', 'MCLR', 'VPP'],
- 'RA4': ['RA4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['RA4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['RA5', 'T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': ['RC0', 'C2IN+'],
- 'RC1': ['RC1', 'C12IN1'],
- 'RC2': ['RC2', 'C12IN2-'],
- 'RC3': ['RC3', 'C12IN3-'],
+ 'RC0': ['RC0', 'AN4', 'C2IN+'],
+ 'RC1': ['RC1', 'AN5', 'C12IN1'],
+ 'RC2': ['RC2', 'AN6', 'C12IN2-'],
+ 'RC3': ['RC3', 'AN7', 'C12IN3-'],
'RC4': ['RC4', 'C2OUT'],
'RC5': ['RC5']},
'16HV785': {'RA0': ['RA0', 'AN0', 'C1IN+', 'ICSPDAT'],
Modified: trunk/tools/pinmap_pinsuffix.py
==============================================================================
--- trunk/tools/pinmap_pinsuffix.py (original)
+++ trunk/tools/pinmap_pinsuffix.py Sat Jul 4 10:19:10 2009
@@ -53,11 +53,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12F615': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN0-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12F615': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN0-', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'12F629': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
'RA1': ['GP1', 'CIN-', 'ICSPCLK'],
@@ -71,11 +71,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12F675': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12F675': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'12F683': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT', 'ULPWU'],
'RA1': ['GP1', 'AN1', 'CIN-', 'VREF', 'ICSPCLK'],
@@ -89,11 +89,11 @@
'RA3': ['GP3', 'MCLR', 'VPP'],
'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
- '12HV615': {'RA0': ['GP0', 'CIN+', 'ICSPDAT'],
- 'RA1': ['GP1', 'CIN0-', 'ICSPCLK'],
- 'RA2': ['GP2', 'T0CKI', 'INT', 'COUT'],
+ '12HV615': {'RA0': ['GP0', 'AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['GP1', 'AN1', 'CIN0-', 'ICSPCLK'],
+ 'RA2': ['GP2', 'AN2', 'T0CKI', 'INT', 'COUT'],
'RA3': ['GP3', 'MCLR', 'VPP'],
- 'RA4': ['GP4', 'CIN1-', 'T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['GP4', 'AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['GP5', 'T1CKI', 'OSC1', 'CLKIN']},
'16F505': {'RB0': ['ICSPDAT'],
'RB1': ['ICSPCLK'],
@@ -207,16 +207,16 @@
'RC3': ['C12IN3-'],
'RC4': ['C2OUT'],
'RC5': []},
- '16F616': {'RA0': ['C1IN+', 'ICSPDAT'],
- 'RA1': ['C12IN0-', 'ICSPCLK'],
- 'RA2': ['T0CKI', 'INT', 'C1OUT'],
+ '16F616': {'RA0': ['AN0', 'C1IN+', 'ICSPDAT'],
+ 'RA1': ['AN1', 'C12IN0-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['MCLR', 'VPP'],
- 'RA4': ['T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': ['C2IN+'],
- 'RC1': ['C12IN1'],
- 'RC2': ['C12IN2-'],
- 'RC3': ['C12IN3-'],
+ 'RC0': ['AN4', 'C2IN+'],
+ 'RC1': ['AN5', 'C12IN1'],
+ 'RC2': ['AN6', 'C12IN2-'],
+ 'RC3': ['AN7', 'C12IN3-'],
'RC4': ['C2OUT'],
'RC5': []},
'16F627': {'RA0': ['AN0'],
@@ -353,16 +353,16 @@
'RB5': [],
'RB6': ['T1OSO', 'T1CKI', 'PGC'],
'RB7': ['T1OSI', 'PGD']},
- '16F676': {'RA0': ['CIN+', 'ICSPDAT'],
- 'RA1': ['CIN-', 'ICSPCLK'],
- 'RA2': ['COUT', 'T0CKI', 'INT'],
+ '16F676': {'RA0': ['AN0', 'CIN+', 'ICSPDAT'],
+ 'RA1': ['AN1', 'CIN-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['AN2', 'COUT', 'T0CKI', 'INT'],
'RA3': ['MCLR', 'VPP'],
- 'RA4': ['T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': [],
- 'RC1': [],
- 'RC2': [],
- 'RC3': [],
+ 'RC0': ['AN4'],
+ 'RC1': ['AN5'],
+ 'RC2': ['AN6'],
+ 'RC3': ['AN7'],
'RC4': [],
'RC5': []},
'16F677': {'RA0': ['AN0', 'C1IN+', 'ICSPDAT', 'ULPWU'],
@@ -985,8 +985,8 @@
'16F87': {'RA0': ['AN0'],
'RA1': ['AN1'],
'RA2': ['AN2', 'CVREF'],
- 'RA3': ['AN3', 'VREF+'],
- 'RA4': ['AN4', 'T0CKI'],
+ 'RA3': ['AN3', 'C1OUT'],
+ 'RA4': ['T0CKI', 'C2OUT'],
'RA5': ['MCLR', 'VPP'],
'RA6': ['OSC2', 'CLKO'],
'RA7': ['OSC1', 'CLKI'],
@@ -996,8 +996,8 @@
'RB3': ['PGM', 'CCP1_RB3'],
'RB4': ['SCK', 'SCL'],
'RB5': ['SS', 'TX', 'CK'],
- 'RB6': ['AN5', 'PGC'],
- 'RB7': ['AN6', 'PGD']},
+ 'RB6': ['PGC', 'T1OSO', 'T1CKI'],
+ 'RB7': ['PGD', 'T1OSI']},
'16F870': {'RA0': ['AN0'],
'RA1': ['AN1'],
'RA2': ['AN2', 'VREF'],
@@ -1297,9 +1297,9 @@
'RE2': ['CS', 'AN7']},
'16F88': {'RA0': ['AN0'],
'RA1': ['AN1'],
- 'RA2': ['AN2', 'CVREF'],
- 'RA3': ['AN3', 'VREF+'],
- 'RA4': ['AN4', 'T0CKI'],
+ 'RA2': ['AN2', 'CVREF', 'VREF-'],
+ 'RA3': ['AN3', 'VREF+', 'C1OUT'],
+ 'RA4': ['AN4', 'T0CKI', 'C2OUT'],
'RA5': ['MCLR', 'VPP'],
'RA6': ['OSC2', 'CLKO'],
'RA7': ['OSC1', 'CLKI'],
@@ -1309,8 +1309,8 @@
'RB3': ['PGM', 'CCP1_RB3'],
'RB4': ['SCK', 'SCL'],
'RB5': ['SS', 'TX', 'CK'],
- 'RB6': ['AN5', 'PGC'],
- 'RB7': ['AN6', 'PGD']},
+ 'RB6': ['AN5', 'PGC', 'T1OSO', 'T1CKI'],
+ 'RB7': ['AN6', 'PGD', 'T1OSI']},
'16F882': {'RA0': ['AN0', 'ULPWU', 'C12IN0'],
'RA1': ['AN1', 'C12IN1'],
'RA2': ['AN2', 'VREF-', 'CVREF', 'C2IN+'],
@@ -1658,16 +1658,16 @@
'RC3': ['C12IN3-'],
'RC4': ['C2OUT'],
'RC5': []},
- '16HV616': {'RA0': ['C1IN+', 'ICSPDAT'],
- 'RA1': ['C12IN0-', 'ICSPCLK'],
- 'RA2': ['T0CKI', 'INT', 'C1OUT'],
+ '16HV616': {'RA0': ['AN0', 'C1IN+', 'ICSPDAT'],
+ 'RA1': ['AN1', 'C12IN0-', 'VREF', 'ICSPCLK'],
+ 'RA2': ['AN2', 'T0CKI', 'INT', 'C1OUT'],
'RA3': ['MCLR', 'VPP'],
- 'RA4': ['T1G', 'OSC2', 'CLKOUT'],
+ 'RA4': ['AN3', 'T1G', 'OSC2', 'CLKOUT'],
'RA5': ['T1CKI', 'OSC1', 'CLKIN'],
- 'RC0': ['C2IN+'],
- 'RC1': ['C12IN1'],
- 'RC2': ['C12IN2-'],
- 'RC3': ['C12IN3-'],
+ 'RC0': ['AN4', 'C2IN+'],
+ 'RC1': ['AN5', 'C12IN1'],
+ 'RC2': ['AN6', 'C12IN2-'],
+ 'RC3': ['AN7', 'C12IN3-'],
'RC4': ['C2OUT'],
'RC5': []},
'16HV785': {'RA0': ['AN0', 'C1IN+', 'ICSPDAT'],
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