Revision: 1477 Author: robhamerling Date: Fri Nov 13 00:16:30 2009 Log: removing invalid samples
http://code.google.com/p/jallib/source/detail?r=1477 Deleted: /trunk/sample/18F14K50_blink_II.jal /trunk/sample/18F14K50_sqrt.jal /trunk/sample/18F2450_blink_II.jal /trunk/sample/18F2450_sqrt.jal /trunk/sample/18F4550_blink_II.jal /trunk/sample/18F4550_sqrt.jal /trunk/test/jal/test_blink_II.jal ======================================= --- /trunk/sample/18F14K50_blink_II.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,90 +0,0 @@ --- ------------------------------------------------------ --- Title: Blink-an-LED of the Microchip PIC* --- --- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: Joep Suijs (universal test file) --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Sample blink-an-LED program for Microchip PIC16f628a --- --- Sources: --- --- Notes: --- - File creation date/time: 22 Aug 2008 13:36:27. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F14K50_AF.jal --- * test : test_blink_II.jal --- - -;@jallib section chipdef --- chip setup -include 18f14k50 - --- This file is the setup for my homebrew, 18f14k50 board --- Currently it is a bare board, with just a PIC and a couple of headers --- A 12 MHz external crystal and 15pf caps connected to OSC1/2 --- pin 17 (Vusb) with a 220 nF capacitor to the ground --- The connection between PC and the 18F14k50 --- +5v to power the board (don't forget 100nf decoupling cap --- data- wire to pin 18 (D-) --- data+ wire to pin 19 (D+) --- ground wire to the Vss of the PIC --- even though the external crystal is 12 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - --- fuses -pragma target CPUDIV P1 -- NO_CPU_SYSTEM_CLOCK_DIVIDE -pragma target USBDIV P1 -- USB_CLOCK_COMES_DIRECTLY_FROM_THE_OSC1_OSC2_OSCILLATOR_BLOCK_NO_DIVIDE -pragma target OSC HS -pragma target PLLEN P4 -- OSCILLATOR_MULTIPLIED_BY_4 -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target VOLTAGE V30 -- brown out voltage -pragma target WDT DISABLED -- no watchdog -pragma target WDTPS P32K -- watch dog saler setting -pragma target MCLR EXTERNAL -- external reset -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTRB DISABLED -- boot block not protected -pragma target HFOFST ENABLED -- THE_SYSTEM_CLOCK_IS_HELD_OFF_UNTIL_THE_HFINTOSC_IS_STABLE - -;@jallib section led --- LED IO definition -alias led is pin_c4 -alias led_direction is pin_c4_direction -alias led2 is pin_c6 -alias led2_direction is pin_c6_direction - -enable_digital_io() --- -led_direction = output --- -forever loop - led = on - _usec_delay(250000) - led = off - _usec_delay(250000) -end loop --- ======================================= --- /trunk/sample/18F14K50_sqrt.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,116 +0,0 @@ --- ------------------------------------------------------ --- Title: Test program for sqrt.jal --- --- Author: Joep Suijs, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Test program --- --- Sources: --- --- Notes: as output, this sample produces characters on a serial link. First --- run serial tests to make sure serial comms works okay. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F14K50_AF.jal --- * test : test_sqrt.jal --- - -;@jallib section chipdef --- chip setup -include 18f14k50 - --- This file is the setup for my homebrew, 18f14k50 board --- Currently it is a bare board, with just a PIC and a couple of headers --- A 12 MHz external crystal and 15pf caps connected to OSC1/2 --- pin 17 (Vusb) with a 220 nF capacitor to the ground --- The connection between PC and the 18F14k50 --- +5v to power the board (don't forget 100nf decoupling cap --- data- wire to pin 18 (D-) --- data+ wire to pin 19 (D+) --- ground wire to the Vss of the PIC --- even though the external crystal is 12 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - --- fuses -pragma target CPUDIV P1 -- NO_CPU_SYSTEM_CLOCK_DIVIDE -pragma target USBDIV P1 -- USB_CLOCK_COMES_DIRECTLY_FROM_THE_OSC1_OSC2_OSCILLATOR_BLOCK_NO_DIVIDE -pragma target OSC HS -pragma target PLLEN P4 -- OSCILLATOR_MULTIPLIED_BY_4 -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target VOLTAGE V30 -- brown out voltage -pragma target WDT DISABLED -- no watchdog -pragma target WDTPS P32K -- watch dog saler setting -pragma target MCLR EXTERNAL -- external reset -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTRB DISABLED -- boot block not protected -pragma target HFOFST ENABLED -- THE_SYSTEM_CLOCK_IS_HELD_OFF_UNTIL_THE_HFINTOSC_IS_STABLE - -;@jallib section led --- LED IO definition -alias led is pin_c4 -alias led_direction is pin_c4_direction -alias led2 is pin_c6 -alias led2_direction is pin_c6_direction - -include delay -include print - --- set all IO as digital -enable_digital_io() - --- setup serial (see echo.jal for more details);@jallib section serial -const serial_hw_baudrate = 115_200 - -include serial_hardware -serial_hw_init() -include profiler - -include math - -led_direction = output - -var word r - -forever loop - delay_100ms( 5 ) - LED = high - delay_100ms( 5 ) - LED = low - - -- serial_hw_data is a pseudo-var of the desired output-device. - serial_hw_data = "A" -- output an A to the serial port. - - profiler_setup(0) - - profiler_start() - r = sqrt32(65535*65533) - profiler_stop_and_report(serial_hw_data) - - print_word_dec(serial_hw_data, r) - -end loop ======================================= --- /trunk/sample/18F2450_blink_II.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,85 +0,0 @@ --- ------------------------------------------------------ --- Title: Blink-an-LED of the Microchip PIC* --- --- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: Joep Suijs (universal test file) --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Sample blink-an-LED program for Microchip PIC16f628a --- --- Sources: --- --- Notes: --- - File creation date/time: 22 Aug 2008 13:36:27. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F2450_AF.jal --- * test : test_blink_II.jal --- - -;@jallib section chipdef --- chip setup -include 18f2450 - --- even though the external crystal is 20 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - - --- fuses -pragma target PLLDIV P5 -- divide by 5 (20 MHz) -pragma target CPUDIV P2 -- 96 MHz pll src / 2 -pragma target USBPLL F48MHZ -- clock from 96 MHz / 2 -pragma target OSC HS_PLL -- hs + pll, usb hs -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target VREGEN ENABLED -- USB voltage regulator -pragma target VOLTAGE V20 -- brown out voltage -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target WDTPS P32K -- watch dog saler setting -pragma target WDT DISABLED -- no watchdog -pragma target PBADEN DIGITAL -- digital input port<0..4> -pragma target LPT1OSC LOW_POWER -- low power timer 1 -pragma target MCLR INTERNAL -- no master reset -pragma target STVR DISABLED -- reset on stack over/under flow -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTRB DISABLED -- boot block not protected - -;@jallib section led --- LED IO definition -alias led is pin_b3 -alias led_direction is pin_b3_direction -alias led2 is pin_b1 -alias led2_direction is pin_b1_direction - -enable_digital_io() --- -led_direction = output --- -forever loop - led = on - _usec_delay(250000) - led = off - _usec_delay(250000) -end loop --- ======================================= --- /trunk/sample/18F2450_sqrt.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,112 +0,0 @@ --- ------------------------------------------------------ --- Title: Test program for sqrt.jal --- --- Author: Joep Suijs, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Test program --- --- Sources: --- --- Notes: as output, this sample produces characters on a serial link. First --- run serial tests to make sure serial comms works okay. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F2450_AF.jal --- * test : test_sqrt.jal --- - -;@jallib section chipdef --- chip setup -include 18f2450 - --- even though the external crystal is 20 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - - --- fuses -pragma target PLLDIV P5 -- divide by 5 (20 MHz) -pragma target CPUDIV P2 -- 96 MHz pll src / 2 -pragma target USBPLL F48MHZ -- clock from 96 MHz / 2 -pragma target OSC HS_PLL -- hs + pll, usb hs -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target VREGEN ENABLED -- USB voltage regulator -pragma target VOLTAGE V20 -- brown out voltage -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target WDTPS P32K -- watch dog saler setting -pragma target WDT DISABLED -- no watchdog -pragma target PBADEN DIGITAL -- digital input port<0..4> -pragma target LPT1OSC LOW_POWER -- low power timer 1 -pragma target MCLR INTERNAL -- no master reset -pragma target STVR DISABLED -- reset on stack over/under flow -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTRB DISABLED -- boot block not protected - -;@jallib section led --- LED IO definition -alias led is pin_b3 -alias led_direction is pin_b3_direction -alias led2 is pin_b1 -alias led2_direction is pin_b1_direction - -include delay -include print - --- set all IO as digital -enable_digital_io() - --- setup serial (see echo.jal for more details);@jallib section serial -const serial_hw_baudrate = 115_200 - - -include serial_hardware -serial_hw_init() -include profiler - -include math - -led_direction = output - -var word r - -forever loop - delay_100ms( 5 ) - LED = high - delay_100ms( 5 ) - LED = low - - -- serial_hw_data is a pseudo-var of the desired output-device. - serial_hw_data = "A" -- output an A to the serial port. - - profiler_setup(0) - - profiler_start() - r = sqrt32(65535*65533) - profiler_stop_and_report(serial_hw_data) - - print_word_dec(serial_hw_data, r) - -end loop ======================================= --- /trunk/sample/18F4550_blink_II.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,94 +0,0 @@ --- ------------------------------------------------------ --- Title: Blink-an-LED of the Microchip PIC* --- --- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: Joep Suijs (universal test file) --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Sample blink-an-LED program for Microchip PIC16f628a --- --- Sources: --- --- Notes: --- - File creation date/time: 22 Aug 2008 13:36:27. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F4550_AF.jal --- * test : test_blink_II.jal --- - -;@jallib section chipdef --- chip setup -include 18f4550 - --- even though the external crystal is 20 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - - --- fuses -pragma target PLLDIV P5 -- divide by 5 - 20MHZ_INPUT -pragma target CPUDIV P2 -- OSC1_OSC2_SRC_1_96MHZ_PLL_SRC_2 -pragma target USBPLL F48MHZ -- CLOCK_SRC_FROM_96MHZ_PLL_2 -pragma target OSC HS_PLL -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target VREGEN ENABLED -- USB voltage regulator -pragma target VOLTAGE V20 -- brown out voltage -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target WDTPS P32K -- watch dog saler setting -pragma target WDT DISABLED -- no watchdog -pragma target CCP2MUX pin_C1 -- CCP2 pin -pragma target PBADEN DIGITAL -- digital input port<0..4> -pragma target LPT1OSC LOW_POWER -- low power timer 1 -pragma target MCLR EXTERNAL -- master reset on RE3 -pragma target STVR DISABLED -- reset on stack over/under flow -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CP2 DISABLED -- code block 2 not protected -pragma target CP3 DISABLED -- code block 3 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target CPD DISABLED -- eeprom code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRT2 DISABLED -- table write block 2 not protected -pragma target WRT3 DISABLED -- table write block 3 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTD DISABLED -- eeprom not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTR2 DISABLED -- table read block 2 not protected -pragma target EBTR3 DISABLED -- table read block 3 not protected -pragma target EBTRB DISABLED -- boot block not protected - -;@jallib section led --- LED IO definition -alias led is pin_b3 -alias led_direction is pin_b3_direction -alias led2 is pin_b1 -alias led2_direction is pin_b1_direction - -enable_digital_io() --- -led_direction = output --- -forever loop - led = on - _usec_delay(250000) - led = off - _usec_delay(250000) -end loop --- ======================================= --- /trunk/sample/18F4550_sqrt.jal Thu Nov 12 12:43:37 2009 +++ /dev/null @@ -1,120 +0,0 @@ --- ------------------------------------------------------ --- Title: Test program for sqrt.jal --- --- Author: Joep Suijs, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Test program --- --- Sources: --- --- Notes: as output, this sample produces characters on a serial link. First --- run serial tests to make sure serial comms works okay. --- --- ------------------------------------------------------ --- --- This file has been generated from: --- * board: board_18F4550_AF.jal --- * test : test_sqrt.jal --- - -;@jallib section chipdef --- chip setup -include 18f4550 - --- even though the external crystal is 20 MHz, the configuration is such that --- the CPU clock is derived from the 96 Mhz PLL clock (div2), therefore set --- target frequency to 48 MHz -pragma target clock 48_000_000 - - --- fuses -pragma target PLLDIV P5 -- divide by 5 - 20MHZ_INPUT -pragma target CPUDIV P2 -- OSC1_OSC2_SRC_1_96MHZ_PLL_SRC_2 -pragma target USBPLL F48MHZ -- CLOCK_SRC_FROM_96MHZ_PLL_2 -pragma target OSC HS_PLL -pragma target FCMEN DISABLED -pragma target IESO DISABLED -pragma target PWRTE DISABLED -- power up timer -pragma target VREGEN ENABLED -- USB voltage regulator -pragma target VOLTAGE V20 -- brown out voltage -pragma target BROWNOUT DISABLED -- no brownout detection -pragma target WDTPS P32K -- watch dog saler setting -pragma target WDT DISABLED -- no watchdog -pragma target CCP2MUX pin_C1 -- CCP2 pin -pragma target PBADEN DIGITAL -- digital input port<0..4> -pragma target LPT1OSC LOW_POWER -- low power timer 1 -pragma target MCLR EXTERNAL -- master reset on RE3 -pragma target STVR DISABLED -- reset on stack over/under flow -pragma target LVP DISABLED -- no low-voltage programming -pragma target XINST ENABLED -- extended instruction set -pragma target DEBUG DISABLED -- background debugging -pragma target CP0 DISABLED -- code block 0 not protected -pragma target CP1 DISABLED -- code block 1 not protected -pragma target CP2 DISABLED -- code block 2 not protected -pragma target CP3 DISABLED -- code block 3 not protected -pragma target CPB DISABLED -- bootblock code not write protected -pragma target CPD DISABLED -- eeprom code not write protected -pragma target WRT0 DISABLED -- table writeblock 0 not protected -pragma target WRT1 DISABLED -- table write block 1 not protected -pragma target WRT2 DISABLED -- table write block 2 not protected -pragma target WRT3 DISABLED -- table write block 3 not protected -pragma target WRTB DISABLED -- bootblock not write protected -pragma target WRTD DISABLED -- eeprom not write protected -pragma target WRTC DISABLED -- config not write protected -pragma target EBTR0 DISABLED -- table read block 0 not protected -pragma target EBTR1 DISABLED -- table read block 1 not protected -pragma target EBTR2 DISABLED -- table read block 2 not protected -pragma target EBTR3 DISABLED -- table read block 3 not protected -pragma target EBTRB DISABLED -- boot block not protected - -;@jallib section led --- LED IO definition -alias led is pin_b3 -alias led_direction is pin_b3_direction -alias led2 is pin_b1 -alias led2_direction is pin_b1_direction - -include delay -include print - --- set all IO as digital -enable_digital_io() - --- setup serial (see echo.jal for more details);@jallib section serial -const serial_hw_baudrate = 115_200 - -include serial_hardware -serial_hw_init() -include profiler - -include math - -led_direction = output - -var word r - -forever loop - delay_100ms( 5 ) - LED = high - delay_100ms( 5 ) - LED = low - - -- serial_hw_data is a pseudo-var of the desired output-device. - serial_hw_data = "A" -- output an A to the serial port. - - profiler_setup(0) - - profiler_start() - r = sqrt32(65535*65533) - profiler_stop_and_report(serial_hw_data) - - print_word_dec(serial_hw_data, r) - -end loop ======================================= --- /trunk/test/jal/test_blink_II.jal Sun Mar 15 10:24:52 2009 +++ /dev/null @@ -1,35 +0,0 @@ --- ------------------------------------------------------ --- Title: Blink-an-LED of the Microchip PIC* --- --- Author: Rob Hamerling, Copyright (c) 2008..2008, all rights reserved. --- --- Adapted-by: Joep Suijs (universal test file) --- --- Compiler: >=2.4g --- --- This file is part of jallib (http://jallib.googlecode.com) --- Released under the BSD license (http://www.opensource.org/licenses/bsd-license.php) --- --- Description: Sample blink-an-LED program for Microchip PIC16f628a --- --- Sources: --- --- Notes: --- - File creation date/time: 22 Aug 2008 13:36:27. --- --- ------------------------------------------------------ - -;@jallib use chipdef -;@jallib use led - -enable_digital_io() --- -led_direction = output --- -forever loop - led = on - _usec_delay(250000) - led = off - _usec_delay(250000) -end loop --- --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
