Comment #1 on issue 165 by robhamerling: Wrong frequency in USB sample http://code.google.com/p/jallib/issues/detail?id=165
The datasheet of the 18F4550 group (39632E figure 2-1 and table 2-3) shows that the divisor value of CPUDIV depends on the selection of the oscillator, in particular if PLL is used or not. When PLL is not used the divisors values are 1,2,3,4, in which case the keywords P1, P2, P3 and P4 are appropriate. These are the current keywords in Jallib and in the latest JalPack (0.7) When PLL is used the divisor values are 2,3,4,6, in which case the keywords P2, P3, P4 and P6 would be appropriate (the keywords with JalPack 0.6!)
I don't think it is possible to select one or the other at compile time, so we have to choose for one or the other.
In the MPLAB .dev files I found 44 PICs (18F/LF) with CPUDIV, of which 10 have PLL. So the current keyword set is valid for 44 PICs, while for 10 of these PICs the keywords will result in a different divisor value than the keyword suggests when PLL is enabled.
So I suggest we keep the current keyword set, and add a paragraph in devicefiles.html to explain the use of CPUDIV for these devices. This implies that sample programs which use CPUDIV and PLL have to be adapted.
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