> I have tried it, and yes: it works. Nice circuit :-)
This is how I think it might work: If both lines are open, both are held high to their appropriate levels by each pullup resistor. The FET has a gate-source voltage of ~0V and is isolating the drain, which can therefore rise higher than source. This is the state when both lines are high. Now, each line must be able to pull the other line low. If the 3.3V-side goes low, the gate stays at 3.3V. There is now a positive voltage between gate and source, the FET becomes conductive, and pulls the 5V line down to the level of the 3.3V-line. And if the 5V-line drops? Well, that's simply the body diode inside the FET becoming conductive, pulling the 3.3V-line low. Greets, Kiste -- You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/jallib?hl=en.
