On 14 May 2012, at 21:15 , Sebastien Lelong wrote:
Fixes are committed, I'm assuming these changes are ok for Eur ?
intcon_GIE
should be capitalised. I corrected that.
Thanks
Seb
2012/5/14 Joep Suijs <[email protected]>
Hi Vasile,
I tried uploading via the web interface, but get a 'unknown server
error'. Not sure if this should work... Anyway, I hope someone else
has a working svn setup to help you out.
Joep
2012/5/14 vasile surducan <[email protected]>:
> Hi all,
>
> I have corrected and tested the code, at least for me it's
working ok. Care
> should be taken if INTCON_PEIE must be set for the other program
purposes...
> I have attached the file, maybe if you don't mind some of you
will upload
> it, my Tortoise does not work right now...
>
> thx,
> Vasile
>
> On Sun, May 13, 2012 at 8:14 PM, vasile surducan
<[email protected]>
> wrote:
>>
>> Hi,
>>
>> I'm trying to use rtc_isr_tmr3.jal from jalpack 2.4o_0.8_0.9_0.9
without
>> success.
>> I know well the bresenham theory, however something is weird
here with the
>> procedure itself.
>>
>> The initialisation sequence I'm using is here:
>>
>> procedure initTimer3 ( ) is
>> -----------------------------------------------------------
>> T3CON_TMR3ON = 0 ; TMR3 off
>> T3CON_T3CKPS = 0b00 ; 1:1 prescaler
>> T3CON_TMR3CS = 0 ; internal clock (Fosc/4)
>> RCON_IPEN = low ; set low priority interrupts
>> PIR2_TMR3IF = low ; clear interrupt flag
>> PIE2_TMR3IE = on ; TMR3 interrupt enabled
>> ; IPR2_TMR3IP = on ; Not relevant low priority
interrupts are
>> set
>> INTCON_PEIE = on ; peripheral interrupt enabled
>> INTCON_GIE = on ; global interrupt enabled
>> T3CON_TMR3ON = 1 ; enable TMR3
>> end procedure
>>
>> The ISR procedure from library is here:
>>
>> var volatile byte seconds -- global variable
updated by ISR
>> const _rtc_cycles_per_second = (target_clock / 4)
>> var volatile dword _rtc_bresenham = _rtc_cycles_per_second
>>
>> procedure RTC() is
>> pragma interrupt
>> PIR2_TMR3IF = false -- clear interrupt flag
>> _rtc_bresenham = _rtc_bresenham - 0x1_00_00
>> if _rtc_bresenham < 0x1_00_00 then
>> seconds = seconds + 1
>> _rtc_bresenham = _rtc_bresenham + _rtc_cycles_per_second
>> end if
>> end procedure
>>
>> comments from library:
>> -- TMR3 runs on internal clock speed and interrupts on overflow
>> -- every TMR3 interrupt decreases _rtc_bresenham by 0x1_00_00,
or 2^16
>>
>> Question: how would be this possible since PIR2_TMR3IF is never
tested?
>>
>> maybe Eur can help.
>>
>> thx,
>> Vasile
>>
>
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