Hi Joep,
Please add 18F67J50 to your samples with internal oscillator. I lost some
of the samples for this with your sample cleanup. I will test. Thanks.
include 18f67j50 -- target PICmicro
--
-- Compiler directives
pragma target CLOCK 48_000_000 -- CPU frequency
--
-- Configuration memory settings (fuses)
pragma target OSC INTOSC_NOCLKOUT_PLL -- internal oscillator
-- and using PLL
pragma target PLLDIV P2 -- reduce OSC 20->4 MHz for PLL input
pragma target CPUDIV P1 -- CPU freq. from PLL(96/2): 48 MHz
pragma target FCMEN DISABLED -- no fail-safeclock monitoring
pragma target IESO DISABLED -- no in/ext oscillator switchover
pragma target WDT CONTROL -- no watchdog
pragma target XINST DISABLED -- not supported by JalV2
pragma target DEBUG DISABLED -- no debugging
--
-- Note: Not specified:
-- Code protection, Boot Block Code protection, Data EEPROM
protection,
-- Write protection, Configuration Memory write protection,
-- Table Read protection, Boot Block Table Read protection,
-- and maybe some other configuration bits.
--
OSCCON_SCS = 0b00 -- select primary clock source
OSCTUNE_PLLEN = enabled -- activate PLL module
--
WDTCON_SWDTEN = OFF -- disable WDT
--
enable_digital_io() -- make all pins digital I/O
_usec_delay (100_000) -- wait for power to stablilize
--
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