Signed-off-by: Vegard Nossum <vegard.nos...@gmail.com>
---
arch/mmix/include/arch/registers.h | 9 +++++
arch/x86/include/arch/registers_32.h | 4 ++-
arch/x86/registers_32.c | 58 ++++++++++++++++++++-------------
jit/linear-scan.c | 14 +++++---
4 files changed, 55 insertions(+), 30 deletions(-)
diff --git a/arch/mmix/include/arch/registers.h
b/arch/mmix/include/arch/registers.h
index 06e9554..d5c1d51 100644
--- a/arch/mmix/include/arch/registers.h
+++ b/arch/mmix/include/arch/registers.h
@@ -1,6 +1,10 @@
#ifndef __JIT_REGISTERS_H
#define __JIT_REGISTERS_H
+#include <stdbool.h>
+
+#include "vm/types.h"
+
enum machine_reg {
R0,
R1,
@@ -17,6 +21,11 @@ enum machine_reg {
enum machine_reg_type reg_type(enum machine_reg reg);
+static inline bool reg_supports_type(enum machine_reg reg, enum vm_type type)
+{
+ return true;
+}
+
#define GPR_VM_TYPE J_LONG
#endif /* __JIT_REGISTERS_H */
diff --git a/arch/x86/include/arch/registers_32.h
b/arch/x86/include/arch/registers_32.h
index 05df975..ac6e308 100644
--- a/arch/x86/include/arch/registers_32.h
+++ b/arch/x86/include/arch/registers_32.h
@@ -3,6 +3,7 @@
#include <limits.h>
#include <stdbool.h>
+#include <stdint.h>
#include <assert.h>
#include <vm/types.h>
@@ -48,6 +49,7 @@ enum machine_reg {
#define GPR_VM_TYPE J_INT
const char *reg_name(enum machine_reg reg);
-enum machine_reg_type reg_type(enum machine_reg reg);
+
+bool reg_supports_type(enum machine_reg reg, enum vm_type type);
#endif /* __X86_REGISTERS_32_H */
diff --git a/arch/x86/registers_32.c b/arch/x86/registers_32.c
index cc13355..5d88f1c 100644
--- a/arch/x86/registers_32.c
+++ b/arch/x86/registers_32.c
@@ -28,26 +28,7 @@
#include "jit/vars.h"
#include <assert.h>
-
-static enum machine_reg_type register_types[] = {
- [MACH_REG_EAX] = REG_TYPE_GPR,
- [MACH_REG_EBX] = REG_TYPE_GPR,
- [MACH_REG_ECX] = REG_TYPE_GPR,
- [MACH_REG_EDX] = REG_TYPE_GPR,
- [MACH_REG_EDI] = REG_TYPE_GPR,
- [MACH_REG_ESI] = REG_TYPE_GPR,
- [MACH_REG_ESP] = REG_TYPE_GPR,
- [MACH_REG_EBP] = REG_TYPE_GPR,
-
- [MACH_REG_XMM0] = REG_TYPE_FPU,
- [MACH_REG_XMM1] = REG_TYPE_FPU,
- [MACH_REG_XMM2] = REG_TYPE_FPU,
- [MACH_REG_XMM3] = REG_TYPE_FPU,
- [MACH_REG_XMM4] = REG_TYPE_FPU,
- [MACH_REG_XMM5] = REG_TYPE_FPU,
- [MACH_REG_XMM6] = REG_TYPE_FPU,
- [MACH_REG_XMM7] = REG_TYPE_FPU,
-};
+#include <stdbool.h>
static const char *register_names[] = {
[MACH_REG_EAX] = "EAX",
@@ -76,9 +57,40 @@ const char *reg_name(enum machine_reg reg)
return register_names[reg];
}
-enum machine_reg_type reg_type(enum machine_reg reg)
+#define GPR_32 (1UL << J_REFERENCE) | (1UL << J_INT)
+#define GPR_16 (1UL << J_SHORT) | (1UL << J_CHAR)
+#define GPR_8 (1UL << J_BYTE) | (1UL << J_BOOLEAN)
+#define FPU (1UL << J_FLOAT) | (1UL << J_DOUBLE)
+
+bool reg_supports_type(enum machine_reg reg, enum vm_type type)
{
- assert(reg != MACH_REG_UNASSIGNED);
+ static const uint32_t table[NR_REGISTERS] = {
+ [MACH_REG_EAX] = GPR_32 | GPR_16 | GPR_8,
+ [MACH_REG_ECX] = GPR_32 | GPR_16 | GPR_8,
+ [MACH_REG_EDX] = GPR_32 | GPR_16 | GPR_8,
+ [MACH_REG_EBX] = GPR_32 | GPR_16 | GPR_8,
+
+ /* XXX: We can't access the lower nibbles of these registers,
+ * so they shouldn't have GPR_16 or GPR_8, but we need it for
+ * now to work around a reg-alloc bug. */
+ [MACH_REG_ESI] = GPR_32 | GPR_16 | GPR_8,
+ [MACH_REG_EDI] = GPR_32 | GPR_16 | GPR_8,
+
+ [MACH_REG_XMM0] = FPU,
+ [MACH_REG_XMM1] = FPU,
+ [MACH_REG_XMM2] = FPU,
+ [MACH_REG_XMM3] = FPU,
+ [MACH_REG_XMM4] = FPU,
+ [MACH_REG_XMM5] = FPU,
+ [MACH_REG_XMM6] = FPU,
+ [MACH_REG_XMM7] = FPU,
+ };
+
+ assert(reg < NR_REGISTERS);
+ assert(type < VM_TYPE_MAX);
+ assert(type != J_VOID);
+ assert(type != J_RETURN_ADDRESS);
+ assert(type != J_LONG);
- return register_types[reg];
+ return table[reg] & (1UL << type);
}
diff --git a/jit/linear-scan.c b/jit/linear-scan.c
index f038ba3..a220b77 100644
--- a/jit/linear-scan.c
+++ b/jit/linear-scan.c
@@ -88,15 +88,15 @@ static void set_block_pos(unsigned long *block_pos,
unsigned long *use_pos,
}
/* Find the register that is used the latest. */
-static enum machine_reg pick_register(unsigned long *free_until_pos, enum
machine_reg_type type)
+static enum machine_reg pick_register(unsigned long *free_until_pos, enum
vm_type type)
{
unsigned long max_pos = 0;
- int i, ret = 0;
+ int ret = -1;
- for (i = 0; i < NR_REGISTERS; i++) {
+ for (unsigned int i = 0; i < NR_REGISTERS; i++) {
unsigned long pos = free_until_pos[i];
- if (reg_type(i) != type)
+ if (!reg_supports_type(i, type))
continue;
if (pos >= max_pos) {
@@ -104,6 +104,8 @@ static enum machine_reg pick_register(unsigned long
*free_until_pos, enum machin
ret = i;
}
}
+
+ assert(ret != -1);
return ret;
}
@@ -235,7 +237,7 @@ static void allocate_blocked_reg(struct live_interval
*current,
}
}
- reg = pick_register(use_pos, current->var_info->type);
+ reg = pick_register(use_pos, current->var_info->vm_type);
if (use_pos[reg] < next_use_pos(current, 0)) {
unsigned long pos;
@@ -295,7 +297,7 @@ static void try_to_allocate_free_reg(struct live_interval
*current,
}
}
- reg = pick_register(free_until_pos, current->var_info->type);
+ reg = pick_register(free_until_pos, current->var_info->vm_type);
if (free_until_pos[reg] == 0) {
/*
* No register available without spilling.
--
1.6.0.6
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