Add instructions:
INSN_FNSTCW_MEMBASE - store fpu control word
INSN_FLDCW_MEMBASE - load fpu control word
INSN_FISTP_64_MEMBASE - store double value as 64-bit integer with truncation.
Signed-off-by: Tomek Grabiec <tgrab...@gmail.com>
---
arch/x86/emit-code.c | 18 ++++++++++++++++++
arch/x86/include/arch/instruction.h | 3 +++
arch/x86/lir-printer.c | 21 +++++++++++++++++++++
arch/x86/use-def.c | 3 +++
4 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/x86/emit-code.c b/arch/x86/emit-code.c
index e443925..b1102ca 100644
--- a/arch/x86/emit-code.c
+++ b/arch/x86/emit-code.c
@@ -1276,6 +1276,21 @@ static void emit_fild_64_membase(struct buffer *buf,
struct operand *src)
__emit_membase(buf, 0xdf, mach_reg(&src->base_reg), src->disp, 5);
}
+static void emit_fldcw_membase(struct buffer *buf, struct operand *src)
+{
+ __emit_membase(buf, 0xd9, mach_reg(&src->base_reg), src->disp, 5);
+}
+
+static void emit_fnstcw_membase(struct buffer *buf, struct operand *dest)
+{
+ __emit_membase(buf, 0xd9, mach_reg(&dest->base_reg), dest->disp, 7);
+}
+
+static void emit_fistp_64_membase(struct buffer *buf, struct operand *dest)
+{
+ __emit_membase(buf, 0xdf, mach_reg(&dest->base_reg), dest->disp, 7);
+}
+
static void emit_fstp_membase(struct buffer *buf, struct operand *dest)
{
__emit_membase(buf, 0xd9, mach_reg(&dest->base_reg), dest->disp, 3);
@@ -1810,7 +1825,10 @@ struct emitter emitters[] = {
DECL_EMITTER(INSN_FDIV_64_REG_REG, emit_fdiv_64_reg_reg, TWO_OPERANDS),
DECL_EMITTER(INSN_FLD_MEMBASE, emit_fld_membase, TWO_OPERANDS),
DECL_EMITTER(INSN_FLD_64_MEMBASE, emit_fld_64_membase, TWO_OPERANDS),
+ DECL_EMITTER(INSN_FLDCW_MEMBASE, emit_fldcw_membase, SINGLE_OPERAND),
DECL_EMITTER(INSN_FILD_64_MEMBASE, emit_fild_64_membase, TWO_OPERANDS),
+ DECL_EMITTER(INSN_FISTP_64_MEMBASE, emit_fistp_64_membase,
SINGLE_OPERAND),
+ DECL_EMITTER(INSN_FNSTCW_MEMBASE, emit_fnstcw_membase, SINGLE_OPERAND),
DECL_EMITTER(INSN_FSTP_MEMBASE, emit_fstp_membase, TWO_OPERANDS),
DECL_EMITTER(INSN_FSTP_64_MEMBASE, emit_fstp_64_membase, TWO_OPERANDS),
DECL_EMITTER(INSN_CONV_GPR_TO_FPU, emit_conv_gpr_to_fpu, TWO_OPERANDS),
diff --git a/arch/x86/include/arch/instruction.h
b/arch/x86/include/arch/instruction.h
index 13b2932..16ac963 100644
--- a/arch/x86/include/arch/instruction.h
+++ b/arch/x86/include/arch/instruction.h
@@ -88,7 +88,10 @@ enum insn_type {
INSN_FSUB_64_REG_REG,
INSN_FLD_MEMBASE,
INSN_FLD_64_MEMBASE,
+ INSN_FLDCW_MEMBASE,
INSN_FILD_64_MEMBASE,
+ INSN_FISTP_64_MEMBASE,
+ INSN_FNSTCW_MEMBASE,
INSN_FSTP_MEMBASE,
INSN_FSTP_64_MEMBASE,
INSN_CONV_FPU_TO_GPR,
diff --git a/arch/x86/lir-printer.c b/arch/x86/lir-printer.c
index 4d27b3e..e321169 100644
--- a/arch/x86/lir-printer.c
+++ b/arch/x86/lir-printer.c
@@ -352,6 +352,24 @@ static int print_fstp_64_membase(struct string *str,
struct insn *insn)
return print_membase(str, &insn->operand);
}
+static int print_fnstcw_membase(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_membase(str, &insn->operand);
+}
+
+static int print_fldcw_membase(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_membase(str, &insn->operand);
+}
+
+static int print_fistp_64_membase(struct string *str, struct insn *insn)
+{
+ print_func_name(str);
+ return print_membase(str, &insn->operand);
+}
+
static int print_and_membase_reg(struct string *str, struct insn *insn)
{
print_func_name(str);
@@ -939,7 +957,10 @@ static print_insn_fn insn_printers[] = {
[INSN_FDIV_64_REG_REG] = print_fdiv_64_reg_reg,
[INSN_FLD_MEMBASE] = print_fld_membase,
[INSN_FLD_64_MEMBASE] = print_fld_64_membase,
+ [INSN_FLDCW_MEMBASE] = print_fldcw_membase,
[INSN_FILD_64_MEMBASE] = print_fild_64_membase,
+ [INSN_FISTP_64_MEMBASE] = print_fistp_64_membase,
+ [INSN_FNSTCW_MEMBASE] = print_fnstcw_membase,
[INSN_FSTP_MEMBASE] = print_fstp_membase,
[INSN_FSTP_64_MEMBASE] = print_fstp_64_membase,
[INSN_MOV_MEMBASE_XMM] = print_mov_membase_xmm,
diff --git a/arch/x86/use-def.c b/arch/x86/use-def.c
index 95dd996..6ebd7df 100644
--- a/arch/x86/use-def.c
+++ b/arch/x86/use-def.c
@@ -67,9 +67,12 @@ static struct insn_info insn_infos[] = {
DECLARE_INFO(INSN_FMUL_64_MEMDISP_REG, USE_DST | DEF_DST),
DECLARE_INFO(INSN_FDIV_REG_REG, USE_SRC | USE_DST | DEF_DST),
DECLARE_INFO(INSN_FDIV_64_REG_REG, USE_SRC | USE_DST | DEF_DST),
+ DECLARE_INFO(INSN_FLDCW_MEMBASE, USE_SRC | DEF_NONE),
DECLARE_INFO(INSN_FLD_MEMBASE, USE_SRC),
DECLARE_INFO(INSN_FLD_64_MEMBASE, USE_SRC),
DECLARE_INFO(INSN_FILD_64_MEMBASE, USE_SRC),
+ DECLARE_INFO(INSN_FISTP_64_MEMBASE, USE_SRC | DEF_NONE),
+ DECLARE_INFO(INSN_FNSTCW_MEMBASE, USE_SRC | DEF_NONE),
DECLARE_INFO(INSN_FSTP_MEMBASE, USE_SRC),
DECLARE_INFO(INSN_FSTP_64_MEMBASE, USE_SRC),
DECLARE_INFO(INSN_CONV_GPR_TO_FPU, USE_SRC | DEF_DST),
--
1.6.0.6
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