*Please send profiles to [EMAIL PROTECTED]
Dear Partners, Hope you are doing great, Please go through the requirement and send your available consultants updated profiles with contact details and rate per hour ASAP. * * * * *ASIC requirement* *San Jose**, CA* *6 Months* * * * * *Required:* 1) Minimum 4 years of experience in ASIC/SoC/FPGA design/verification experience 2) Verilog, VHDL and C 3) Scripting (Perl) 4) Image processing domain expertise is a plus though not mandatory -- Regards, Venkat Technical Recruiter 609 945 1186 [EMAIL PROTECTED] Ezen Computer Services Inc. --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "java-core" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [EMAIL PROTECTED] For more options, visit this group at http://groups.google.co.in/group/java-core?hl=en-GB -~----------~----~----~----~------~----~------~--~---
