It seems the idea of JIT Hardware Compilation has been around for a while: http://link.springer.com/chapter/10.1007%2F978-3-540-78791-4_12#page-1
http://www.informationweek.com/jit-compilation-to-hardware/d/d-id/1073781? http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6567576&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6567576 On Friday, May 30, 2014 8:58:29 PM UTC-3, Jameson wrote: > > JIT hardware? I guess that is a reasonably logical next step after > doing JIT software compilers > > JIT FGPA sounds almost reasonable. Last time I checked, the Xilinx FGPA > coprocessor was very expensive (like new luxury car expensive), but is > anyone doing stuff like that already? > > On Friday, May 30, 2014, David Ainish <david....@gmail.com <javascript:>> > wrote: > >> Nice projects on those links. LegUp <http://legup.eecg.utoronto.ca/> >> looks good. >> >> I'm new to Julia so this may be a silly question... For that workflow >> (LLVM IR -> FPGA/ASIC), does Julia already emit IR code? if not, once Julia >> is able to emit IR code, would it be possible to use a tool like LegUp to >> create an ASIC? >> >> The workflow IR -> ASIC would be a two-steps workflow. While it's a good >> option, there could be an integrated workflow that would give very >> interesting possibilities tied to Julia's dynamic nature. >> Dreaming out loud, at the time we can 3D print microprocessors, if part >> of our code requires intensive processing and that task could be >> parallelized, we could 3D print for instance 100 processors of that >> specific task and Julia spread the work over those 100 ASICs. >> Or translate the code that requires more computational power dynamically >> to any available FPGA. >> >> >> On Thursday, May 29, 2014 7:00:15 PM UTC-3, Matt Bauman wrote: >>> >>> It seems like there are several groups working on an LLVM IR to >>> FPGA/ASIC compiler. That'd be the way to do it. Make julia emit the IR, >>> and then compile that to your ASIC. >>> >>> http://stackoverflow.com/questions/3664692/creating-a- >>> vhdl-backend-for-llvm >>> Google search: llvm ir hardware (asic|fpga) >>> <https://encrypted.google.com/search?safe=off&hl=en&q=llvm+ir+hardware+%28asic%7Cfpga%29&oq=llvm+ir+hardware+%28asic%7Cfpga%29&gs_l=serp.3...112583.114690.0.114921.7.7.0.0.0.0.154.567.5j2.7.0....0...1c.1.45.serp..7.0.0.jqB_jKu49fw> >>> >>> On Thursday, May 29, 2014 5:26:40 PM UTC-4, John Myles White wrote: >>>> >>>> If someone wrote code to do that, I don't see why it wouldn't be >>>> possible. >>>> >>>> -- John >>>> >>>> On May 29, 2014, at 11:44 AM, David Ainish <david....@gmail.com> wrote: >>>> >>>> 3D printing is growing at a rapid pace and in a few years it will be >>>> possible to 3D print our own integrated circuits and microprocessors. >>>> >>>> Would it be possible for Julia in the future to do Hardware compilation >>>> <http://en.wikipedia.org/wiki/Hardware_compilation> and 3D print ASICs >>>> <http://en.wikipedia.org/wiki/ASIC> from our Julia code? >>>> >>>> >>>> >>>>
