On Thu, Apr 07, 2011 at 08:40:59PM +0400, Pavel Lunin wrote: > > Hi all, > > Anyone here uses policers on LAGs with member interfaces, bound to > different PFE? MX Trio in my case, but same for i-chip would also be > interesting. > > There is some rumor that in such a case policer rate is individually > applied several times to each of the member interfaces meaning actual > rate for the whole LAG depends on no-one knows what.
Rule of thumb: policing is done on a chip closest to customer, and if a link to customer terminated on more than one chip (like in your case - multichip LAG) - policing will be performed on every chip separately without any knowledge on "how many traffic to this customer already came through other chips". Well, with "normal IMIX" this means that if you have two interfaces in LAG your customer theoretically can get up to 2x configured policer rate, if you have four interfaces in LAG - up to 4x and so on. PS: those observations were done on older M320 and I-chip based MX-series. Do not have Trio-based devices, so may be I'm wrong here. Still do not believe that intrachip communications were introduced to aid exact policing anyway. > Too many things get broken in my mind, if this assumption is correct. > Please, tell me it's wrong ) It's absolutely normal :( -- In theory, there is no difference between theory and practice. But, in practice, there is. _______________________________________________ juniper-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/juniper-nsp
