Greetings listers,
Following up on this thread from last year, the fix in PR789804 does
indeed seem to provide relief from the burden of 5% cpu used by clksyncd on
chassis with built-in timing. The PR reads "With newer chassis
(MX80/midRangius) program (MX80-T, MX40-T, MX10-T, MX5-T) H/w is reworked to
implement SPI reads in h/w and it has significantly reduces clksyncd CPU usage
to around 1-2% of CPU." In fact it's around 1% on my MX5-Ts.
However we also have a bunch of MX80s, and we don't need sync ethernet
so we didn't drop the extra dollarettes (+$12.5K list) on the "timing" model so
our MX80s still have clksyncd cruising along at 5% cpu.
As Saku mentioned, disabling clksyncd can cause the MICs to fail to
come
up, so I implemented a less drastic workaround by renice(8)'ing the process.
It seems like clksyncd is started up by init(8) after /etc/rc.custom is
executed, so I just added it in /etc/crontab.sys to run every 6 hours:
# make clksyncd more polite
1 */6 * * * root ps auxw | grep clksyncd |
grep -v grep | awk '{print $2}' | xargs renice 20
crontab.sys is sourced at boot to create the crontab, so it needs to be added
to
the crontab manually the first time (or just renice clksyncd by hand). It'll
need to be added to crontab.sys again after a jinstall...
Hope that helps.
-Blake
---
Blake Willis
Network Engineering Consultant
L33 Networks
"Education enabling individuals to overcome their reluctance or inability to
take full advantage of technological advances and product innovation can be a
means of increasing economic opportunity."
--Alan Greenspan
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