Slegers, Walter wrote:
> I known my MIPS manual by hart. Unfortunately, an original R3000
> processor core has no instructions to provide an atomic exchange or
> an atomic compare and exchange. I there were, I definitely would have
> used that as that seemed to be the proper action. Maybe an R4000
> (which has a store conditional instruction) might be able to do this,
> but on an R3000 you are really out of luck. If I hadn't used the
> "jthread_suspendall" call then I would have to switch to kernel mode
> to disable interrupts....
Could you review my COMPARE_AND_EXCHANGE for MIPS II before I commit it,
I'm learning MIPS assembly :-)
/*
* Do an atomic compare and exchange. The address 'A' is checked against
* value 'O' and if they match it's exchanged with value 'N'.
* We return '1' if the exchange is sucessful, otherwise 0.
*/
/* Note that this version use MIPS II ll/sc instructions */
#define COMPARE_AND_EXCHANGE(A,O,N) \
({ \
unsigned int tmp, ret; \
\
asm volatile( \
" .set noreorder\n" \
" .set mips2\n" \
" li %1, 0\n" \
"1: ll %0, %3\n" \
" bne %0, %4, 2f\n" \
" move %0, %5\n" \
" sc %0, %2\n" \
" beqz %0, 1b\n" \
" li %1, 1\n" \
"2: .set mips0\n" \
" .set reorder\n" \
: "=&r" (tmp), "=r" (ret), "=m" (*(A)) \
: "m" (*(A)), "r" (O), "r" (N) \
: "memory"); \
ret; \
})
--
Edouard G. Parmelan
http://egp.free.fr
