On Fri, 12 Apr 2002 17:05:56 +1000, Brendan J Simon <[EMAIL PROTECTED]> wrote: >I'd like to request a minor change to the makefile rules to generate >targets. Could each rule start with removing the target. > >Example: >%.o : %.c > $(CC) $(CFLAGS) -c -o $@ $< > >becomes: >%.o : %.c > $(RM) $@ > $(CC) $(CFLAGS) -c -o $@ $<
This should already be occurring during the pp_makefile4 processing. That code detects when a target exists but the database is not marked up to date so pp_makefile4 removes the target. It also detects if any of the dependencies (including the source) have changed and removes the target. Run with PP_MAKEFILE4_FLAGS=-vvv to see what it thinks about up to date processing. It is the removal of the target file by pp_makefile4 that forces make to rebuild the target. The alternative is to give make the entire dependency tree in the global makefile, but then the compile time goes exponential. Of course this only works as long as you run pp_makefile4. If you bypass the checks using NO_MAKEFILE_GEN then ... foot, gun, shoot ... _______________________________________________ kbuild-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/kbuild-devel
