CC: [email protected] TO: Luben Tuikov <[email protected]> CC: Alex Deucher <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 6b02addb1d1748d21dd1261e46029b264be4e5a0 commit: 8aba21b75136c39c4bf63345d699d97dc477ce0e [2762/7920] drm/amdgpu: Embed drm_device into amdgpu_device (v3) :::::: branch date: 23 hours ago :::::: commit date: 3 weeks ago config: i386-randconfig-m021-20200916 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> New smatch warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3355 amdgpu_device_init() warn: 'adev->rmmio' not released on lines: 3355. Old smatch warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:937 amdgpu_device_resize_fb_bar() warn: impossible condition '(res->start > 4294967296) => (0-u32max > 4294967296)' # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=8aba21b75136c39c4bf63345d699d97dc477ce0e git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout 8aba21b75136c39c4bf63345d699d97dc477ce0e vim +3355 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 77f3a5cd7023d9 Nirmoy Das 2020-05-07 2977 d38ceaf99ed015 Alex Deucher 2015-04-20 2978 /** d38ceaf99ed015 Alex Deucher 2015-04-20 2979 * amdgpu_device_init - initialize the driver d38ceaf99ed015 Alex Deucher 2015-04-20 2980 * d38ceaf99ed015 Alex Deucher 2015-04-20 2981 * @adev: amdgpu_device pointer d38ceaf99ed015 Alex Deucher 2015-04-20 2982 * @flags: driver flags d38ceaf99ed015 Alex Deucher 2015-04-20 2983 * d38ceaf99ed015 Alex Deucher 2015-04-20 2984 * Initializes the driver info and hw (all asics). d38ceaf99ed015 Alex Deucher 2015-04-20 2985 * Returns 0 for success or an error on failure. d38ceaf99ed015 Alex Deucher 2015-04-20 2986 * Called at driver startup. d38ceaf99ed015 Alex Deucher 2015-04-20 2987 */ d38ceaf99ed015 Alex Deucher 2015-04-20 2988 int amdgpu_device_init(struct amdgpu_device *adev, d38ceaf99ed015 Alex Deucher 2015-04-20 2989 uint32_t flags) d38ceaf99ed015 Alex Deucher 2015-04-20 2990 { 8aba21b75136c3 Luben Tuikov 2020-08-14 2991 struct drm_device *ddev = adev_to_drm(adev); 8aba21b75136c3 Luben Tuikov 2020-08-14 2992 struct pci_dev *pdev = adev->pdev; d38ceaf99ed015 Alex Deucher 2015-04-20 2993 int r, i; 3840c5bcc24563 Alex Deucher 2019-10-04 2994 bool boco = false; 95844d20ae024b Marek Olšák 2016-08-17 2995 u32 max_MBps; d38ceaf99ed015 Alex Deucher 2015-04-20 2996 d38ceaf99ed015 Alex Deucher 2015-04-20 2997 adev->shutdown = false; d38ceaf99ed015 Alex Deucher 2015-04-20 2998 adev->flags = flags; 4e66d7d2156243 Yong Zhao 2019-08-30 2999 4e66d7d2156243 Yong Zhao 2019-08-30 3000 if (amdgpu_force_asic_type >= 0 && amdgpu_force_asic_type < CHIP_LAST) 4e66d7d2156243 Yong Zhao 2019-08-30 3001 adev->asic_type = amdgpu_force_asic_type; 4e66d7d2156243 Yong Zhao 2019-08-30 3002 else 2f7d10b393c83a Jammy Zhou 2015-07-22 3003 adev->asic_type = flags & AMD_ASIC_MASK; 4e66d7d2156243 Yong Zhao 2019-08-30 3004 d38ceaf99ed015 Alex Deucher 2015-04-20 3005 adev->usec_timeout = AMDGPU_MAX_USEC_TIMEOUT; 593aa2d282259e Shaoyun Liu 2018-02-07 3006 if (amdgpu_emu_mode == 1) 8bdab6bb1cf120 Yong Zhao 2020-02-25 3007 adev->usec_timeout *= 10; 770d13b19fdf36 Christian König 2018-01-12 3008 adev->gmc.gart_size = 512 * 1024 * 1024; d38ceaf99ed015 Alex Deucher 2015-04-20 3009 adev->accel_working = false; d38ceaf99ed015 Alex Deucher 2015-04-20 3010 adev->num_rings = 0; d38ceaf99ed015 Alex Deucher 2015-04-20 3011 adev->mman.buffer_funcs = NULL; d38ceaf99ed015 Alex Deucher 2015-04-20 3012 adev->mman.buffer_funcs_ring = NULL; d38ceaf99ed015 Alex Deucher 2015-04-20 3013 adev->vm_manager.vm_pte_funcs = NULL; 0c88b43032131f Nirmoy Das 2019-12-06 3014 adev->vm_manager.vm_pte_num_scheds = 0; 132f34e4b55848 Christian König 2018-01-12 3015 adev->gmc.gmc_funcs = NULL; f54d1867005c33 Chris Wilson 2016-10-25 3016 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); b8866c26ec072f Andres Rodriguez 2017-04-28 3017 bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); d38ceaf99ed015 Alex Deucher 2015-04-20 3018 d38ceaf99ed015 Alex Deucher 2015-04-20 3019 adev->smc_rreg = &amdgpu_invalid_rreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3020 adev->smc_wreg = &amdgpu_invalid_wreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3021 adev->pcie_rreg = &amdgpu_invalid_rreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3022 adev->pcie_wreg = &amdgpu_invalid_wreg; 36b9a952bbf688 Huang Rui 2016-08-31 3023 adev->pciep_rreg = &amdgpu_invalid_rreg; 36b9a952bbf688 Huang Rui 2016-08-31 3024 adev->pciep_wreg = &amdgpu_invalid_wreg; 4fa1c6a679bb0d Tao Zhou 2019-07-24 3025 adev->pcie_rreg64 = &amdgpu_invalid_rreg64; 4fa1c6a679bb0d Tao Zhou 2019-07-24 3026 adev->pcie_wreg64 = &amdgpu_invalid_wreg64; d38ceaf99ed015 Alex Deucher 2015-04-20 3027 adev->uvd_ctx_rreg = &amdgpu_invalid_rreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3028 adev->uvd_ctx_wreg = &amdgpu_invalid_wreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3029 adev->didt_rreg = &amdgpu_invalid_rreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3030 adev->didt_wreg = &amdgpu_invalid_wreg; ccdbb20a75e3e3 Rex Zhu 2016-06-08 3031 adev->gc_cac_rreg = &amdgpu_invalid_rreg; ccdbb20a75e3e3 Rex Zhu 2016-06-08 3032 adev->gc_cac_wreg = &amdgpu_invalid_wreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3033 adev->audio_endpt_rreg = &amdgpu_block_invalid_rreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3034 adev->audio_endpt_wreg = &amdgpu_block_invalid_wreg; d38ceaf99ed015 Alex Deucher 2015-04-20 3035 3e39ab90833b20 Alex Deucher 2015-06-05 3036 DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X).\n", d38ceaf99ed015 Alex Deucher 2015-04-20 3037 amdgpu_asic_name[adev->asic_type], pdev->vendor, pdev->device, 3e39ab90833b20 Alex Deucher 2015-06-05 3038 pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision); d38ceaf99ed015 Alex Deucher 2015-04-20 3039 d38ceaf99ed015 Alex Deucher 2015-04-20 3040 /* mutex initialization are all done here so we d38ceaf99ed015 Alex Deucher 2015-04-20 3041 * can recall function without having locking issues */ d38ceaf99ed015 Alex Deucher 2015-04-20 3042 atomic_set(&adev->irq.ih.lock, 0); 0e5ca0d1ac07ef Huang Rui 2017-03-03 3043 mutex_init(&adev->firmware.mutex); d38ceaf99ed015 Alex Deucher 2015-04-20 3044 mutex_init(&adev->pm.mutex); d38ceaf99ed015 Alex Deucher 2015-04-20 3045 mutex_init(&adev->gfx.gpu_clock_mutex); d38ceaf99ed015 Alex Deucher 2015-04-20 3046 mutex_init(&adev->srbm_mutex); b8866c26ec072f Andres Rodriguez 2017-04-28 3047 mutex_init(&adev->gfx.pipe_reserve_mutex); d23ee13fba23a3 Rex Zhu 2018-07-30 3048 mutex_init(&adev->gfx.gfx_off_mutex); d38ceaf99ed015 Alex Deucher 2015-04-20 3049 mutex_init(&adev->grbm_idx_mutex); d38ceaf99ed015 Alex Deucher 2015-04-20 3050 mutex_init(&adev->mn_lock); e23b74aab5dc48 Alex Deucher 2017-09-28 3051 mutex_init(&adev->virt.vf_errors.lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3052 hash_init(adev->mn_hash); 53b3f8f40e6cff Dennis Li 2020-08-19 3053 atomic_set(&adev->in_gpu_reset, 0); 6049db43d6dd9c Dennis Li 2020-08-20 3054 init_rwsem(&adev->reset_sem); 32eaeae0ef193b Alex Deucher 2019-07-08 3055 mutex_init(&adev->psp.mutex); bd052211233266 Pan, Xinhui 2020-01-16 3056 mutex_init(&adev->notifier_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3057 912dfc846aad77 Evan Quan 2019-04-29 3058 r = amdgpu_device_check_arguments(adev); 912dfc846aad77 Evan Quan 2019-04-29 3059 if (r) 912dfc846aad77 Evan Quan 2019-04-29 3060 return r; d38ceaf99ed015 Alex Deucher 2015-04-20 3061 d38ceaf99ed015 Alex Deucher 2015-04-20 3062 spin_lock_init(&adev->mmio_idx_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3063 spin_lock_init(&adev->smc_idx_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3064 spin_lock_init(&adev->pcie_idx_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3065 spin_lock_init(&adev->uvd_ctx_idx_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3066 spin_lock_init(&adev->didt_idx_lock); ccdbb20a75e3e3 Rex Zhu 2016-06-08 3067 spin_lock_init(&adev->gc_cac_idx_lock); 16abb5d206499d Evan Quan 2017-07-04 3068 spin_lock_init(&adev->se_cac_idx_lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3069 spin_lock_init(&adev->audio_endpt_idx_lock); 95844d20ae024b Marek Olšák 2016-08-17 3070 spin_lock_init(&adev->mm_stats.lock); d38ceaf99ed015 Alex Deucher 2015-04-20 3071 0c4e7fa56112b0 Chunming Zhou 2016-08-17 3072 INIT_LIST_HEAD(&adev->shadow_list); 0c4e7fa56112b0 Chunming Zhou 2016-08-17 3073 mutex_init(&adev->shadow_list_lock); 0c4e7fa56112b0 Chunming Zhou 2016-08-17 3074 beff74bc6e0fa9 Alex Deucher 2019-05-28 3075 INIT_DELAYED_WORK(&adev->delayed_init_work, beff74bc6e0fa9 Alex Deucher 2019-05-28 3076 amdgpu_device_delayed_init_work_handler); 1e317b99f0c244 Rex Zhu 2018-07-27 3077 INIT_DELAYED_WORK(&adev->gfx.gfx_off_delay_work, 1e317b99f0c244 Rex Zhu 2018-07-27 3078 amdgpu_device_delay_enable_gfx_off); 2dc80b00652f2a Shirish S 2017-05-25 3079 d4535e2c018bba Andrey Grodzovsky 2018-11-29 3080 INIT_WORK(&adev->xgmi_reset_work, amdgpu_device_xgmi_reset_func); d4535e2c018bba Andrey Grodzovsky 2018-11-29 3081 d23ee13fba23a3 Rex Zhu 2018-07-30 3082 adev->gfx.gfx_off_req_count = 1; b6e79d9a314ebe Jason Yan 2020-04-27 3083 adev->pm.ac_power = power_supply_is_system_supplied() > 0; b1ddf548472729 Rex Zhu 2018-06-04 3084 b265bdbd9f2811 Evan Quan 2020-05-22 3085 atomic_set(&adev->throttling_logging_enabled, 1); b265bdbd9f2811 Evan Quan 2020-05-22 3086 /* b265bdbd9f2811 Evan Quan 2020-05-22 3087 * If throttling continues, logging will be performed every minute b265bdbd9f2811 Evan Quan 2020-05-22 3088 * to avoid log flooding. "-1" is subtracted since the thermal b265bdbd9f2811 Evan Quan 2020-05-22 3089 * throttling interrupt comes every second. Thus, the total logging b265bdbd9f2811 Evan Quan 2020-05-22 3090 * interval is 59 seconds(retelimited printk interval) + 1(waiting b265bdbd9f2811 Evan Quan 2020-05-22 3091 * for throttling interrupt) = 60 seconds. b265bdbd9f2811 Evan Quan 2020-05-22 3092 */ b265bdbd9f2811 Evan Quan 2020-05-22 3093 ratelimit_state_init(&adev->throttling_logging_rs, (60 - 1) * HZ, 1); b265bdbd9f2811 Evan Quan 2020-05-22 3094 ratelimit_set_flags(&adev->throttling_logging_rs, RATELIMIT_MSG_ON_RELEASE); b265bdbd9f2811 Evan Quan 2020-05-22 3095 0fa4955838ea1e Alex Xie 2017-06-08 3096 /* Registers mapping */ 0fa4955838ea1e Alex Xie 2017-06-08 3097 /* TODO: block userspace mapping of io register */ da69c161448d6a Ken Wang 2016-01-21 3098 if (adev->asic_type >= CHIP_BONAIRE) { d38ceaf99ed015 Alex Deucher 2015-04-20 3099 adev->rmmio_base = pci_resource_start(adev->pdev, 5); d38ceaf99ed015 Alex Deucher 2015-04-20 3100 adev->rmmio_size = pci_resource_len(adev->pdev, 5); da69c161448d6a Ken Wang 2016-01-21 3101 } else { da69c161448d6a Ken Wang 2016-01-21 3102 adev->rmmio_base = pci_resource_start(adev->pdev, 2); da69c161448d6a Ken Wang 2016-01-21 3103 adev->rmmio_size = pci_resource_len(adev->pdev, 2); da69c161448d6a Ken Wang 2016-01-21 3104 } 5c1354bd30c118 Chunming Zhou 2016-08-30 3105 d38ceaf99ed015 Alex Deucher 2015-04-20 3106 adev->rmmio = ioremap(adev->rmmio_base, adev->rmmio_size); d38ceaf99ed015 Alex Deucher 2015-04-20 3107 if (adev->rmmio == NULL) { d38ceaf99ed015 Alex Deucher 2015-04-20 3108 return -ENOMEM; d38ceaf99ed015 Alex Deucher 2015-04-20 3109 } d38ceaf99ed015 Alex Deucher 2015-04-20 3110 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base); d38ceaf99ed015 Alex Deucher 2015-04-20 3111 DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size); d38ceaf99ed015 Alex Deucher 2015-04-20 3112 d38ceaf99ed015 Alex Deucher 2015-04-20 3113 /* io port mapping */ d38ceaf99ed015 Alex Deucher 2015-04-20 3114 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { d38ceaf99ed015 Alex Deucher 2015-04-20 3115 if (pci_resource_flags(adev->pdev, i) & IORESOURCE_IO) { d38ceaf99ed015 Alex Deucher 2015-04-20 3116 adev->rio_mem_size = pci_resource_len(adev->pdev, i); d38ceaf99ed015 Alex Deucher 2015-04-20 3117 adev->rio_mem = pci_iomap(adev->pdev, i, adev->rio_mem_size); d38ceaf99ed015 Alex Deucher 2015-04-20 3118 break; d38ceaf99ed015 Alex Deucher 2015-04-20 3119 } d38ceaf99ed015 Alex Deucher 2015-04-20 3120 } d38ceaf99ed015 Alex Deucher 2015-04-20 3121 if (adev->rio_mem == NULL) b64a18c502feda Amber Lin 2017-01-04 3122 DRM_INFO("PCI I/O BAR is not found.\n"); d38ceaf99ed015 Alex Deucher 2015-04-20 3123 b2109d8ed69765 Jack Xiao 2019-05-24 3124 /* enable PCIE atomic ops */ b2109d8ed69765 Jack Xiao 2019-05-24 3125 r = pci_enable_atomic_ops_to_root(adev->pdev, b2109d8ed69765 Jack Xiao 2019-05-24 3126 PCI_EXP_DEVCAP2_ATOMIC_COMP32 | b2109d8ed69765 Jack Xiao 2019-05-24 3127 PCI_EXP_DEVCAP2_ATOMIC_COMP64); b2109d8ed69765 Jack Xiao 2019-05-24 3128 if (r) { b2109d8ed69765 Jack Xiao 2019-05-24 3129 adev->have_atomics_support = false; b2109d8ed69765 Jack Xiao 2019-05-24 3130 DRM_INFO("PCIE atomic ops is not supported\n"); b2109d8ed69765 Jack Xiao 2019-05-24 3131 } else { b2109d8ed69765 Jack Xiao 2019-05-24 3132 adev->have_atomics_support = true; b2109d8ed69765 Jack Xiao 2019-05-24 3133 } b2109d8ed69765 Jack Xiao 2019-05-24 3134 5494d8640ffc1d Alex Deucher 2018-03-09 3135 amdgpu_device_get_pcie_info(adev); 5494d8640ffc1d Alex Deucher 2018-03-09 3136 b239c01727459b Jack Xiao 2019-01-10 3137 if (amdgpu_mcbp) b239c01727459b Jack Xiao 2019-01-10 3138 DRM_INFO("MCBP is enabled\n"); b239c01727459b Jack Xiao 2019-01-10 3139 5f84cc635bce58 Jack Xiao 2019-01-25 3140 if (amdgpu_mes && adev->asic_type >= CHIP_NAVI10) 5f84cc635bce58 Jack Xiao 2019-01-25 3141 adev->enable_mes = true; 5f84cc635bce58 Jack Xiao 2019-01-25 3142 3aa0115d238c71 Monk Liu 2020-03-04 3143 /* detect hw virtualization here */ 3aa0115d238c71 Monk Liu 2020-03-04 3144 amdgpu_detect_virtualization(adev); 3aa0115d238c71 Monk Liu 2020-03-04 3145 dffa11b4f74b15 Monk Liu 2020-03-04 3146 r = amdgpu_device_get_job_timeout_settings(adev); a190d1c75c73ce Xiaojie Yuan 2019-03-27 3147 if (r) { dffa11b4f74b15 Monk Liu 2020-03-04 3148 dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); a190d1c75c73ce Xiaojie Yuan 2019-03-27 3149 return r; a190d1c75c73ce Xiaojie Yuan 2019-03-27 3150 } a190d1c75c73ce Xiaojie Yuan 2019-03-27 3151 d38ceaf99ed015 Alex Deucher 2015-04-20 3152 /* early init functions */ 06ec907054c5a4 Alex Deucher 2017-12-14 3153 r = amdgpu_device_ip_early_init(adev); d38ceaf99ed015 Alex Deucher 2015-04-20 3154 if (r) d38ceaf99ed015 Alex Deucher 2015-04-20 3155 return r; d38ceaf99ed015 Alex Deucher 2015-04-20 3156 6585661ddd6a0a Oak Zeng 2018-11-19 3157 /* doorbell bar mapping and doorbell index init*/ 6585661ddd6a0a Oak Zeng 2018-11-19 3158 amdgpu_device_doorbell_init(adev); 6585661ddd6a0a Oak Zeng 2018-11-19 3159 d38ceaf99ed015 Alex Deucher 2015-04-20 3160 /* if we have > 1 VGA cards, then disable the amdgpu VGA resources */ d38ceaf99ed015 Alex Deucher 2015-04-20 3161 /* this will fail for cards that aren't VGA class devices, just d38ceaf99ed015 Alex Deucher 2015-04-20 3162 * ignore it */ 06ec907054c5a4 Alex Deucher 2017-12-14 3163 vga_client_register(adev->pdev, adev, NULL, amdgpu_device_vga_set_decode); d38ceaf99ed015 Alex Deucher 2015-04-20 3164 31af062acfbd5d Alex Deucher 2019-10-04 3165 if (amdgpu_device_supports_boco(ddev)) 3840c5bcc24563 Alex Deucher 2019-10-04 3166 boco = true; 3840c5bcc24563 Alex Deucher 2019-10-04 3167 if (amdgpu_has_atpx() && 3840c5bcc24563 Alex Deucher 2019-10-04 3168 (amdgpu_is_atpx_hybrid() || 3840c5bcc24563 Alex Deucher 2019-10-04 3169 amdgpu_has_atpx_dgpu_power_cntl()) && 3840c5bcc24563 Alex Deucher 2019-10-04 3170 !pci_is_thunderbolt_attached(adev->pdev)) 84c8b22e9fe8d9 Lukas Wunner 2017-03-10 3171 vga_switcheroo_register_client(adev->pdev, 3840c5bcc24563 Alex Deucher 2019-10-04 3172 &amdgpu_switcheroo_ops, boco); 3840c5bcc24563 Alex Deucher 2019-10-04 3173 if (boco) d38ceaf99ed015 Alex Deucher 2015-04-20 3174 vga_switcheroo_init_domain_pm_ops(adev->dev, &adev->vga_pm_domain); d38ceaf99ed015 Alex Deucher 2015-04-20 3175 9475a9434f594f Shaoyun Liu 2018-02-01 3176 if (amdgpu_emu_mode == 1) { 9475a9434f594f Shaoyun Liu 2018-02-01 3177 /* post the asic on emulation mode */ 9475a9434f594f Shaoyun Liu 2018-02-01 3178 emu_soc_asic_init(adev); bfca02892773d2 Shaoyun Liu 2018-02-01 3179 goto fence_driver_init; 9475a9434f594f Shaoyun Liu 2018-02-01 3180 } bfca02892773d2 Shaoyun Liu 2018-02-01 3181 4e99a44e37bfed Monk Liu 2016-03-31 3182 /* detect if we are with an SRIOV vbios */ 4e99a44e37bfed Monk Liu 2016-03-31 3183 amdgpu_device_detect_sriov_bios(adev); 048765ad5af7c8 Andres Rodriguez 2016-06-11 3184 95e8e59ec49f7c Alex Deucher 2018-11-01 3185 /* check if we need to reset the asic 95e8e59ec49f7c Alex Deucher 2018-11-01 3186 * E.g., driver was not cleanly unloaded previously, etc. 95e8e59ec49f7c Alex Deucher 2018-11-01 3187 */ f14899fd2a5607 wentalou 2019-01-17 3188 if (!amdgpu_sriov_vf(adev) && amdgpu_asic_need_reset_on_init(adev)) { 95e8e59ec49f7c Alex Deucher 2018-11-01 3189 r = amdgpu_asic_reset(adev); 95e8e59ec49f7c Alex Deucher 2018-11-01 3190 if (r) { 95e8e59ec49f7c Alex Deucher 2018-11-01 3191 dev_err(adev->dev, "asic reset on init failed\n"); 95e8e59ec49f7c Alex Deucher 2018-11-01 3192 goto failed; 95e8e59ec49f7c Alex Deucher 2018-11-01 3193 } 95e8e59ec49f7c Alex Deucher 2018-11-01 3194 } 95e8e59ec49f7c Alex Deucher 2018-11-01 3195 d38ceaf99ed015 Alex Deucher 2015-04-20 3196 /* Post card if necessary */ 39c640c086ad12 Alex Deucher 2017-12-15 3197 if (amdgpu_device_need_post(adev)) { d38ceaf99ed015 Alex Deucher 2015-04-20 3198 if (!adev->bios) { bec86378befae4 Monk Liu 2016-09-14 3199 dev_err(adev->dev, "no vBIOS found\n"); 83ba126a9be318 Alex Deucher 2016-06-03 3200 r = -EINVAL; 83ba126a9be318 Alex Deucher 2016-06-03 3201 goto failed; d38ceaf99ed015 Alex Deucher 2015-04-20 3202 } bec86378befae4 Monk Liu 2016-09-14 3203 DRM_INFO("GPU posting now...\n"); 4e99a44e37bfed Monk Liu 2016-03-31 3204 r = amdgpu_atom_asic_init(adev->mode_info.atom_context); 4e99a44e37bfed Monk Liu 2016-03-31 3205 if (r) { 4e99a44e37bfed Monk Liu 2016-03-31 3206 dev_err(adev->dev, "gpu post error!\n"); 4e99a44e37bfed Monk Liu 2016-03-31 3207 goto failed; 4e99a44e37bfed Monk Liu 2016-03-31 3208 } d38ceaf99ed015 Alex Deucher 2015-04-20 3209 } d38ceaf99ed015 Alex Deucher 2015-04-20 3210 88b64e9536746e Alex Deucher 2017-07-10 3211 if (adev->is_atom_fw) { 88b64e9536746e Alex Deucher 2017-07-10 3212 /* Initialize clocks */ 88b64e9536746e Alex Deucher 2017-07-10 3213 r = amdgpu_atomfirmware_get_clock_info(adev); 88b64e9536746e Alex Deucher 2017-07-10 3214 if (r) { 88b64e9536746e Alex Deucher 2017-07-10 3215 dev_err(adev->dev, "amdgpu_atomfirmware_get_clock_info failed\n"); e23b74aab5dc48 Alex Deucher 2017-09-28 3216 amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0); 88b64e9536746e Alex Deucher 2017-07-10 3217 goto failed; 88b64e9536746e Alex Deucher 2017-07-10 3218 } 88b64e9536746e Alex Deucher 2017-07-10 3219 } else { d38ceaf99ed015 Alex Deucher 2015-04-20 3220 /* Initialize clocks */ d38ceaf99ed015 Alex Deucher 2015-04-20 3221 r = amdgpu_atombios_get_clock_info(adev); 2c1a2784039442 Alex Deucher 2015-12-07 3222 if (r) { 2c1a2784039442 Alex Deucher 2015-12-07 3223 dev_err(adev->dev, "amdgpu_atombios_get_clock_info failed\n"); e23b74aab5dc48 Alex Deucher 2017-09-28 3224 amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_GET_CLOCK_FAIL, 0, 0); 890419409a3aba Gavin Wan 2017-06-23 3225 goto failed; 2c1a2784039442 Alex Deucher 2015-12-07 3226 } d38ceaf99ed015 Alex Deucher 2015-04-20 3227 /* init i2c buses */ 4562236b3bc0a2 Harry Wentland 2017-09-12 3228 if (!amdgpu_device_has_dc_support(adev)) d38ceaf99ed015 Alex Deucher 2015-04-20 3229 amdgpu_atombios_i2c_init(adev); a5bde2f964fa06 Alex Deucher 2016-09-23 3230 } d38ceaf99ed015 Alex Deucher 2015-04-20 3231 bfca02892773d2 Shaoyun Liu 2018-02-01 3232 fence_driver_init: d38ceaf99ed015 Alex Deucher 2015-04-20 3233 /* Fence driver */ d38ceaf99ed015 Alex Deucher 2015-04-20 3234 r = amdgpu_fence_driver_init(adev); 2c1a2784039442 Alex Deucher 2015-12-07 3235 if (r) { 2c1a2784039442 Alex Deucher 2015-12-07 3236 dev_err(adev->dev, "amdgpu_fence_driver_init failed\n"); e23b74aab5dc48 Alex Deucher 2017-09-28 3237 amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_FENCE_INIT_FAIL, 0, 0); 83ba126a9be318 Alex Deucher 2016-06-03 3238 goto failed; 2c1a2784039442 Alex Deucher 2015-12-07 3239 } d38ceaf99ed015 Alex Deucher 2015-04-20 3240 d38ceaf99ed015 Alex Deucher 2015-04-20 3241 /* init the mode config */ 4a580877bdcb83 Luben Tuikov 2020-08-24 3242 drm_mode_config_init(adev_to_drm(adev)); d38ceaf99ed015 Alex Deucher 2015-04-20 3243 06ec907054c5a4 Alex Deucher 2017-12-14 3244 r = amdgpu_device_ip_init(adev); d38ceaf99ed015 Alex Deucher 2015-04-20 3245 if (r) { 8840a3878d40c9 pding 2017-10-23 3246 /* failed in exclusive mode due to timeout */ 8840a3878d40c9 pding 2017-10-23 3247 if (amdgpu_sriov_vf(adev) && 8840a3878d40c9 pding 2017-10-23 3248 !amdgpu_sriov_runtime(adev) && 8840a3878d40c9 pding 2017-10-23 3249 amdgpu_virt_mmio_blocked(adev) && 8840a3878d40c9 pding 2017-10-23 3250 !amdgpu_virt_wait_reset(adev)) { 8840a3878d40c9 pding 2017-10-23 3251 dev_err(adev->dev, "VF exclusive mode timeout\n"); 1daee8b472e896 Pixel Ding 2017-11-08 3252 /* Don't send request since VF is inactive. */ 1daee8b472e896 Pixel Ding 2017-11-08 3253 adev->virt.caps &= ~AMDGPU_SRIOV_CAPS_RUNTIME; 1daee8b472e896 Pixel Ding 2017-11-08 3254 adev->virt.ops = NULL; 8840a3878d40c9 pding 2017-10-23 3255 r = -EAGAIN; 8840a3878d40c9 pding 2017-10-23 3256 goto failed; 8840a3878d40c9 pding 2017-10-23 3257 } 06ec907054c5a4 Alex Deucher 2017-12-14 3258 dev_err(adev->dev, "amdgpu_device_ip_init failed\n"); e23b74aab5dc48 Alex Deucher 2017-09-28 3259 amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_INIT_FAIL, 0, 0); 83ba126a9be318 Alex Deucher 2016-06-03 3260 goto failed; d38ceaf99ed015 Alex Deucher 2015-04-20 3261 } d38ceaf99ed015 Alex Deucher 2015-04-20 3262 d69b8971e540ae Yong Zhao 2020-04-17 3263 dev_info(adev->dev, d69b8971e540ae Yong Zhao 2020-04-17 3264 "SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n", d7f72fe482bfb7 Yong Zhao 2019-12-11 3265 adev->gfx.config.max_shader_engines, d7f72fe482bfb7 Yong Zhao 2019-12-11 3266 adev->gfx.config.max_sh_per_se, d7f72fe482bfb7 Yong Zhao 2019-12-11 3267 adev->gfx.config.max_cu_per_sh, d7f72fe482bfb7 Yong Zhao 2019-12-11 3268 adev->gfx.cu_info.number); d7f72fe482bfb7 Yong Zhao 2019-12-11 3269 d38ceaf99ed015 Alex Deucher 2015-04-20 3270 adev->accel_working = true; d38ceaf99ed015 Alex Deucher 2015-04-20 3271 e59c020598666f Alex Xie 2017-06-01 3272 amdgpu_vm_check_compute_bug(adev); e59c020598666f Alex Xie 2017-06-01 3273 95844d20ae024b Marek Olšák 2016-08-17 3274 /* Initialize the buffer migration limit. */ 95844d20ae024b Marek Olšák 2016-08-17 3275 if (amdgpu_moverate >= 0) 95844d20ae024b Marek Olšák 2016-08-17 3276 max_MBps = amdgpu_moverate; 95844d20ae024b Marek Olšák 2016-08-17 3277 else 95844d20ae024b Marek Olšák 2016-08-17 3278 max_MBps = 8; /* Allow 8 MB/s. */ 95844d20ae024b Marek Olšák 2016-08-17 3279 /* Get a log2 for easy divisions. */ 95844d20ae024b Marek Olšák 2016-08-17 3280 adev->mm_stats.log2_max_MBps = ilog2(max(1u, max_MBps)); 95844d20ae024b Marek Olšák 2016-08-17 3281 9bc92b9c8d0919 Monk Liu 2017-02-08 3282 amdgpu_fbdev_init(adev); 9bc92b9c8d0919 Monk Liu 2017-02-08 3283 d2f52ac800fec2 Rex Zhu 2017-09-22 3284 r = amdgpu_pm_sysfs_init(adev); 7c868b592d5c2c Yintian Tao 2019-11-29 3285 if (r) { 7c868b592d5c2c Yintian Tao 2019-11-29 3286 adev->pm_sysfs_en = false; d2f52ac800fec2 Rex Zhu 2017-09-22 3287 DRM_ERROR("registering pm debugfs failed (%d).\n", r); 7c868b592d5c2c Yintian Tao 2019-11-29 3288 } else 7c868b592d5c2c Yintian Tao 2019-11-29 3289 adev->pm_sysfs_en = true; d2f52ac800fec2 Rex Zhu 2017-09-22 3290 5bb23532732384 Ori Messinger 2019-04-22 3291 r = amdgpu_ucode_sysfs_init(adev); 7c868b592d5c2c Yintian Tao 2019-11-29 3292 if (r) { 7c868b592d5c2c Yintian Tao 2019-11-29 3293 adev->ucode_sysfs_en = false; 5bb23532732384 Ori Messinger 2019-04-22 3294 DRM_ERROR("Creating firmware sysfs failed (%d).\n", r); 7c868b592d5c2c Yintian Tao 2019-11-29 3295 } else 7c868b592d5c2c Yintian Tao 2019-11-29 3296 adev->ucode_sysfs_en = true; 5bb23532732384 Ori Messinger 2019-04-22 3297 d38ceaf99ed015 Alex Deucher 2015-04-20 3298 if ((amdgpu_testing & 1)) { d38ceaf99ed015 Alex Deucher 2015-04-20 3299 if (adev->accel_working) d38ceaf99ed015 Alex Deucher 2015-04-20 3300 amdgpu_test_moves(adev); d38ceaf99ed015 Alex Deucher 2015-04-20 3301 else d38ceaf99ed015 Alex Deucher 2015-04-20 3302 DRM_INFO("amdgpu: acceleration disabled, skipping move tests\n"); d38ceaf99ed015 Alex Deucher 2015-04-20 3303 } d38ceaf99ed015 Alex Deucher 2015-04-20 3304 if (amdgpu_benchmarking) { d38ceaf99ed015 Alex Deucher 2015-04-20 3305 if (adev->accel_working) d38ceaf99ed015 Alex Deucher 2015-04-20 3306 amdgpu_benchmark(adev, amdgpu_benchmarking); d38ceaf99ed015 Alex Deucher 2015-04-20 3307 else d38ceaf99ed015 Alex Deucher 2015-04-20 3308 DRM_INFO("amdgpu: acceleration disabled, skipping benchmarks\n"); d38ceaf99ed015 Alex Deucher 2015-04-20 3309 } d38ceaf99ed015 Alex Deucher 2015-04-20 3310 b0adca4d50169d Evan Quan 2019-11-05 3311 /* b0adca4d50169d Evan Quan 2019-11-05 3312 * Register gpu instance before amdgpu_device_enable_mgpu_fan_boost. b0adca4d50169d Evan Quan 2019-11-05 3313 * Otherwise the mgpu fan boost feature will be skipped due to the b0adca4d50169d Evan Quan 2019-11-05 3314 * gpu instance is counted less. b0adca4d50169d Evan Quan 2019-11-05 3315 */ b0adca4d50169d Evan Quan 2019-11-05 3316 amdgpu_register_gpu_instance(adev); b0adca4d50169d Evan Quan 2019-11-05 3317 d38ceaf99ed015 Alex Deucher 2015-04-20 3318 /* enable clockgating, etc. after ib tests, etc. since some blocks require d38ceaf99ed015 Alex Deucher 2015-04-20 3319 * explicit gating rather than handling it automatically. d38ceaf99ed015 Alex Deucher 2015-04-20 3320 */ 06ec907054c5a4 Alex Deucher 2017-12-14 3321 r = amdgpu_device_ip_late_init(adev); 2c1a2784039442 Alex Deucher 2015-12-07 3322 if (r) { 06ec907054c5a4 Alex Deucher 2017-12-14 3323 dev_err(adev->dev, "amdgpu_device_ip_late_init failed\n"); e23b74aab5dc48 Alex Deucher 2017-09-28 3324 amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_AMDGPU_LATE_INIT_FAIL, 0, r); 83ba126a9be318 Alex Deucher 2016-06-03 3325 goto failed; 2c1a2784039442 Alex Deucher 2015-12-07 3326 } d38ceaf99ed015 Alex Deucher 2015-04-20 3327 108c6a6309c96a xinhui pan 2019-03-11 3328 /* must succeed. */ 511fdbc33aaa47 xinhui pan 2019-05-09 3329 amdgpu_ras_resume(adev); 108c6a6309c96a xinhui pan 2019-03-11 3330 beff74bc6e0fa9 Alex Deucher 2019-05-28 3331 queue_delayed_work(system_wq, &adev->delayed_init_work, beff74bc6e0fa9 Alex Deucher 2019-05-28 3332 msecs_to_jiffies(AMDGPU_RESUME_MS)); beff74bc6e0fa9 Alex Deucher 2019-05-28 3333 2c738637bac1aa Monk Liu 2020-06-29 3334 if (amdgpu_sriov_vf(adev)) 2c738637bac1aa Monk Liu 2020-06-29 3335 flush_delayed_work(&adev->delayed_init_work); 2c738637bac1aa Monk Liu 2020-06-29 3336 77f3a5cd7023d9 Nirmoy Das 2020-05-07 3337 r = sysfs_create_files(&adev->dev->kobj, amdgpu_dev_attributes); bd607166af7fe3 Kent Russell 2020-03-13 3338 if (r) { 77f3a5cd7023d9 Nirmoy Das 2020-05-07 3339 dev_err(adev->dev, "Could not create amdgpu device attr\n"); bd607166af7fe3 Kent Russell 2020-03-13 3340 return r; bd607166af7fe3 Kent Russell 2020-03-13 3341 } bd607166af7fe3 Kent Russell 2020-03-13 3342 d155bef0636e01 Arnd Bergmann 2019-07-08 3343 if (IS_ENABLED(CONFIG_PERF_EVENTS)) 9c7c85f7ea1fe5 Jonathan Kim 2019-06-19 3344 r = amdgpu_pmu_init(adev); 9c7c85f7ea1fe5 Jonathan Kim 2019-06-19 3345 if (r) 9c7c85f7ea1fe5 Jonathan Kim 2019-06-19 3346 dev_err(adev->dev, "amdgpu_pmu_init failed\n"); 9c7c85f7ea1fe5 Jonathan Kim 2019-06-19 3347 d38ceaf99ed015 Alex Deucher 2015-04-20 3348 return 0; 83ba126a9be318 Alex Deucher 2016-06-03 3349 83ba126a9be318 Alex Deucher 2016-06-03 3350 failed: 890419409a3aba Gavin Wan 2017-06-23 3351 amdgpu_vf_error_trans_all(adev); 3840c5bcc24563 Alex Deucher 2019-10-04 3352 if (boco) 83ba126a9be318 Alex Deucher 2016-06-03 3353 vga_switcheroo_fini_domain_pm_ops(adev->dev); 8840a3878d40c9 pding 2017-10-23 3354 83ba126a9be318 Alex Deucher 2016-06-03 @3355 return r; d38ceaf99ed015 Alex Deucher 2015-04-20 3356 } d38ceaf99ed015 Alex Deucher 2015-04-20 3357 :::::: The code at line 3355 was first introduced by commit :::::: 83ba126a9be318ca4f66b066faadd2c728d1568c drm/amdgpu: properly clean up runtime pm :::::: TO: Alex Deucher <[email protected]> :::::: CC: Alex Deucher <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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