CC: [email protected]
CC: [email protected]
TO: Nicolas Toromanoff <[email protected]>
CC: Herbert Xu <[email protected]>

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   ed8780e3f2ecc82645342d070c6b4e530532e680
commit: bbf2cb1ea1e1428589d7f4d652bed15b265ce92d crypto: stm32/crc32 - Avoid 
lock if hardware is already used
date:   5 weeks ago
:::::: branch date: 65 minutes ago
:::::: commit date: 5 weeks ago
config: arm-randconfig-s031-20201028 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
        wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.3-56-gc09e8239-dirty
        # 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=bbf2cb1ea1e1428589d7f4d652bed15b265ce92d
        git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
        git fetch --no-tags linus master
        git checkout bbf2cb1ea1e1428589d7f4d652bed15b265ce92d
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>


"sparse warnings: (new ones prefixed by >>)"
>> drivers/crypto/stm32/stm32-crc32.c:147:12: sparse: sparse: context imbalance 
>> in 'burst_update' - wrong count at exit

vim +/burst_update +147 drivers/crypto/stm32/stm32-crc32.c

b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  146  
7795c0baf5ac25e drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12 @147  static int burst_update(struct shash_desc *desc, const u8 *d8,
7795c0baf5ac25e drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  148                        size_t length)
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  149  {
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  150        struct stm32_crc_desc_ctx *ctx = shash_desc_ctx(desc);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  151        struct stm32_crc_ctx *mctx = crypto_shash_ctx(desc->tfm);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  152        struct stm32_crc *crc;
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  153  
10b89c43a64eb0d drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  154        crc = stm32_crc_get_next_crc();
10b89c43a64eb0d drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  155        if (!crc)
10b89c43a64eb0d drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  156                return -ENODEV;
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  157  
73463ade0a57d2c drivers/crypto/stm32/stm32_crc32.c [email protected] 
2018-06-26  158        pm_runtime_get_sync(crc->dev);
73463ade0a57d2c drivers/crypto/stm32/stm32_crc32.c [email protected] 
2018-06-26  159  
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  160        if (!spin_trylock(&crc->lock)) {
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  161                /* Hardware is busy, calculate crc32 by software 
*/
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  162                if (mctx->poly == CRC32_POLY_LE)
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  163                        ctx->partial = crc32_le(ctx->partial, 
d8, length);
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  164                else
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  165                        ctx->partial = __crc32c_le(ctx->partial, 
d8, length);
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  166  
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  167                goto pm_out;
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  168        }
7795c0baf5ac25e drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  169  
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  170        /*
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  171         * Restore previously calculated CRC for this context as 
init value
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  172         * Restore polynomial configuration
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  173         * Configure in register for word input data,
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  174         * Configure out register in reversed bit mode data.
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  175         */
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  176        writel_relaxed(bitrev32(ctx->partial), crc->regs + 
CRC_INIT);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  177        writel_relaxed(bitrev32(mctx->poly), crc->regs + 
CRC_POL);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  178        writel_relaxed(CRC_CR_RESET | CRC_CR_REV_IN_WORD | 
CRC_CR_REV_OUT,
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  179                       crc->regs + CRC_CR);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  180  
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  181        if (d8 != PTR_ALIGN(d8, sizeof(u32))) {
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  182                /* Configure for byte data */
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  183                writel_relaxed(CRC_CR_REV_IN_BYTE | 
CRC_CR_REV_OUT,
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  184                               crc->regs + CRC_CR);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  185                while (d8 != PTR_ALIGN(d8, sizeof(u32)) && 
length) {
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  186                        writeb_relaxed(*d8++, crc->regs + 
CRC_DR);
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  187                        length--;
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  188                }
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  189                /* Configure for word data */
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  190                writel_relaxed(CRC_CR_REV_IN_WORD | 
CRC_CR_REV_OUT,
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  191                               crc->regs + CRC_CR);
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  192        }
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  193  
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  194        for (; length >= sizeof(u32); d8 += sizeof(u32), length 
-= sizeof(u32))
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  195                writel_relaxed(*((u32 *)d8), crc->regs + CRC_DR);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  196  
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  197        if (length) {
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  198                /* Configure for byte data */
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  199                writel_relaxed(CRC_CR_REV_IN_BYTE | 
CRC_CR_REV_OUT,
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  200                               crc->regs + CRC_CR);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  201                while (length--)
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  202                        writeb_relaxed(*d8++, crc->regs + 
CRC_DR);
49c2c082e00e0bc drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  203        }
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  204  
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  205        /* Store partial result */
391775191f38f80 drivers/crypto/stm32/stm32_crc32.c [email protected] 
2017-07-13  206        ctx->partial = readl_relaxed(crc->regs + CRC_DR);
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  207  
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  208        spin_unlock(&crc->lock);
7795c0baf5ac25e drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-05-12  209  
bbf2cb1ea1e1428 drivers/crypto/stm32/stm32-crc32.c Nicolas Toromanoff    
2020-09-16  210  pm_out:
73463ade0a57d2c drivers/crypto/stm32/stm32_crc32.c [email protected] 
2018-06-26  211        pm_runtime_mark_last_busy(crc->dev);
73463ade0a57d2c drivers/crypto/stm32/stm32_crc32.c [email protected] 
2018-06-26  212        pm_runtime_put_autosuspend(crc->dev);
73463ade0a57d2c drivers/crypto/stm32/stm32_crc32.c [email protected] 
2018-06-26  213  
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  214        return 0;
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  215  }
b51dbe90912a0ce drivers/crypto/stm32/stm32_crc32.c Fabien DESSENNE       
2017-03-21  216  

:::::: The code at line 147 was first introduced by commit
:::::: 7795c0baf5ac25e104fec8677ad134066a8fb8d3 crypto: stm32/crc32 - protect 
from concurrent accesses

:::::: TO: Nicolas Toromanoff <[email protected]>
:::::: CC: Herbert Xu <[email protected]>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

Attachment: .config.gz
Description: application/gzip

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