CC: [email protected]
TO: "Greg Kroah-Hartman" <[email protected]>

tree:   https://android.googlesource.com/kernel/goldfish android-3.18
head:   2f59ddfdb1feb7cea14527478d78cc439611d004
commit: 2ba6a62eeac8aa2e0d3cbf6622850eeee4ce0ffc [15065/17039] mmc: sdhci: Fix 
regression setting power on Trats2 board
:::::: branch date: 2 days ago
:::::: commit date: 7 months ago
config: x86_64-randconfig-s022-20201206 (attached as .config)
compiler: gcc-5 (Ubuntu 5.5.0-12ubuntu1) 5.5.0 20171010
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-179-ga00755aa-dirty
        git remote add android-goldfish 
https://android.googlesource.com/kernel/goldfish
        git fetch --no-tags android-goldfish android-3.18
        git checkout 2ba6a62eeac8aa2e0d3cbf6622850eeee4ce0ffc
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>


"sparse warnings: (new ones prefixed by >>)"
   drivers/mmc/host/sdhci.c: note: in included file (through 
arch/x86/include/asm/msr.h, arch/x86/include/asm/processor.h, 
arch/x86/include/asm/thread_info.h, ...):
   arch/x86/include/asm/paravirt.h:819:9: sparse: sparse: context imbalance in 
'sdhci_set_clock' - unexpected unlock
>> arch/x86/include/asm/paravirt.h:819:9: sparse: sparse: context imbalance in 
>> 'sdhci_set_power_reg' - unexpected unlock
   arch/x86/include/asm/bitops.h: Assembler messages:
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'
   arch/x86/include/asm/bitops.h:206: Warning: no instruction mnemonic suffix 
given and no register operands; using default for `bts'

vim +/sdhci_set_power_reg +819 arch/x86/include/asm/paravirt.h

139ec7c416248b include/asm-i386/paravirt.h     Rusty Russell       2006-12-07  
816  
b5908548537ccd arch/x86/include/asm/paravirt.h Steven Rostedt      2010-11-10  
817  static inline notrace void arch_local_irq_enable(void)
139ec7c416248b include/asm-i386/paravirt.h     Rusty Russell       2006-12-07  
818  {
71999d9862e667 arch/x86/include/asm/paravirt.h Jeremy Fitzhardinge 2009-10-12 
@819      PVOP_VCALLEE0(pv_irq_ops.irq_enable);
139ec7c416248b include/asm-i386/paravirt.h     Rusty Russell       2006-12-07  
820  }
139ec7c416248b include/asm-i386/paravirt.h     Rusty Russell       2006-12-07  
821  

:::::: The code at line 819 was first introduced by commit
:::::: 71999d9862e667f1fd14f8fbfa0cce6d855bad3f x86/paravirt: Use normal 
calling sequences for irq enable/disable

:::::: TO: Jeremy Fitzhardinge <[email protected]>
:::::: CC: Ingo Molnar <[email protected]>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

Attachment: .config.gz
Description: application/gzip

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