CC: [email protected] CC: [email protected] TO: Will Deacon <[email protected]>
Hi Will, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 14e3e989f6a5d9646b6cf60690499cc8bdc11f7d commit: e86d1aa8b60f7ea18d36f50296d7d20eb2852e7e iommu/arm-smmu: Move Arm SMMU drivers into their own subdirectory date: 5 months ago :::::: branch date: 2 hours ago :::::: commit date: 5 months ago config: i386-randconfig-m021-20201228 (attached as .config) compiler: gcc-9 (Debian 9.3.0-15) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/iommu/arm/arm-smmu/arm-smmu.c:682 arm_smmu_init_domain_context() warn: missing error code 'ret' drivers/iommu/arm/arm-smmu/arm-smmu.c:1843 arm_smmu_device_cfg_probe() warn: should '2 * size << smmu->pgshift' be a 64 bit type? vim +/ret +682 drivers/iommu/arm/arm-smmu/arm-smmu.c 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 662 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 663 static int arm_smmu_init_domain_context(struct iommu_domain *domain, 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 664 struct arm_smmu_device *smmu) 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 665 { a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 666 int irq, start, ret = 0; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 667 unsigned long ias, oas; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 668 struct io_pgtable_ops *pgtbl_ops; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 669 struct io_pgtable_cfg pgtbl_cfg; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 670 enum io_pgtable_fmt fmt; 1d672638fca24db drivers/iommu/arm-smmu.c Joerg Roedel 2015-03-26 671 struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 672 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 673 irqreturn_t (*context_fault)(int irq, void *dev); 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 674 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 675 mutex_lock(&smmu_domain->init_mutex); a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 676 if (smmu_domain->smmu) a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 677 goto out_unlock; a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 678 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 679 if (domain->type == IOMMU_DOMAIN_IDENTITY) { 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 680 smmu_domain->stage = ARM_SMMU_DOMAIN_BYPASS; 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 681 smmu_domain->smmu = smmu; 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 @682 goto out_unlock; 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 683 } 61bc671179f1906 drivers/iommu/arm-smmu.c Will Deacon 2017-01-06 684 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 685 /* c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 686 * Mapping the requested stage onto what we support is surprisingly c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 687 * complicated, mainly because the spec allows S1+S2 SMMUs without c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 688 * support for nested translation. That means we end up with the c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 689 * following table: c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 690 * c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 691 * Requested Supported Actual c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 692 * S1 N S1 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 693 * S1 S1+S2 S1 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 694 * S1 S2 S2 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 695 * S1 S1 S1 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 696 * N N N c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 697 * N S1+S2 S2 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 698 * N S2 S2 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 699 * N S1 S1 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 700 * c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 701 * Note that you can't actually request stage-2 mappings. 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 702 */ c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 703 if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 704 smmu_domain->stage = ARM_SMMU_DOMAIN_S2; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 705 if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 706 smmu_domain->stage = ARM_SMMU_DOMAIN_S1; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 707 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 708 /* 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 709 * Choosing a suitable context format is even more fiddly. Until we 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 710 * grow some way for the caller to express a preference, and/or move 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 711 * the decision into the io-pgtable code where it arguably belongs, 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 712 * just aim for the closest thing to the rest of the system, and hope 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 713 * that the hardware isn't esoteric enough that we can't assume AArch64 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 714 * support to be a superset of AArch32 support... 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 715 */ 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 716 if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 717 cfg->fmt = ARM_SMMU_CTX_FMT_AARCH32_L; 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 718 if (IS_ENABLED(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) && 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 719 !IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_ARM_LPAE) && 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 720 (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 721 (smmu_domain->stage == ARM_SMMU_DOMAIN_S1)) 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 722 cfg->fmt = ARM_SMMU_CTX_FMT_AARCH32_S; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 723 if ((IS_ENABLED(CONFIG_64BIT) || cfg->fmt == ARM_SMMU_CTX_FMT_NONE) && 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 724 (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 725 ARM_SMMU_FEAT_FMT_AARCH64_16K | 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 726 ARM_SMMU_FEAT_FMT_AARCH64_4K))) 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 727 cfg->fmt = ARM_SMMU_CTX_FMT_AARCH64; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 728 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 729 if (cfg->fmt == ARM_SMMU_CTX_FMT_NONE) { 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 730 ret = -EINVAL; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 731 goto out_unlock; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 732 } 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 733 c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 734 switch (smmu_domain->stage) { c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 735 case ARM_SMMU_DOMAIN_S1: 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 736 cfg->cbar = CBAR_TYPE_S1_TRANS_S2_BYPASS; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 737 start = smmu->num_s2_context_banks; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 738 ias = smmu->va_size; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 739 oas = smmu->ipa_size; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 740 if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64) { 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 741 fmt = ARM_64_LPAE_S1; 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 742 } else if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH32_L) { 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 743 fmt = ARM_32_LPAE_S1; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 744 ias = min(ias, 32UL); 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 745 oas = min(oas, 40UL); 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 746 } else { 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 747 fmt = ARM_V7S; 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 748 ias = min(ias, 32UL); 6070529bebd26e0 drivers/iommu/arm-smmu.c Robin Murphy 2016-08-11 749 oas = min(oas, 32UL); 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 750 } abfd6fe0cd535d3 drivers/iommu/arm-smmu.c Will Deacon 2019-07-02 751 smmu_domain->flush_ops = &arm_smmu_s1_tlb_ops; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 752 break; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 753 case ARM_SMMU_DOMAIN_NESTED: c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 754 /* c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 755 * We will likely want to change this if/when KVM gets c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 756 * involved. c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 757 */ c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 758 case ARM_SMMU_DOMAIN_S2: 9c5c92e35cf5c4f drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 759 cfg->cbar = CBAR_TYPE_S2_TRANS; 9c5c92e35cf5c4f drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 760 start = 0; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 761 ias = smmu->ipa_size; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 762 oas = smmu->pa_size; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 763 if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64) { 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 764 fmt = ARM_64_LPAE_S2; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 765 } else { 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 766 fmt = ARM_32_LPAE_S2; 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 767 ias = min(ias, 40UL); 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 768 oas = min(oas, 40UL); 7602b8710645da4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-28 769 } 11febfca2419652 drivers/iommu/arm-smmu.c Robin Murphy 2017-03-30 770 if (smmu->version == ARM_SMMU_V2) abfd6fe0cd535d3 drivers/iommu/arm-smmu.c Will Deacon 2019-07-02 771 smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v2; 11febfca2419652 drivers/iommu/arm-smmu.c Robin Murphy 2017-03-30 772 else abfd6fe0cd535d3 drivers/iommu/arm-smmu.c Will Deacon 2019-07-02 773 smmu_domain->flush_ops = &arm_smmu_s2_tlb_ops_v1; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 774 break; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 775 default: c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 776 ret = -EINVAL; c752ce45b213de8 drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 777 goto out_unlock; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 778 } 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 779 ret = __arm_smmu_alloc_bitmap(smmu->context_map, start, 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 780 smmu->num_context_banks); 287980e49ffc0f6 drivers/iommu/arm-smmu.c Arnd Bergmann 2016-05-27 781 if (ret < 0) a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 782 goto out_unlock; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 783 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 784 cfg->cbndx = ret; b7862e3559f9ab4 drivers/iommu/arm-smmu.c Robin Murphy 2016-04-13 785 if (smmu->version < ARM_SMMU_V2) { 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 786 cfg->irptndx = atomic_inc_return(&smmu->irptndx); 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 787 cfg->irptndx %= smmu->num_context_irqs; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 788 } else { 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 789 cfg->irptndx = cfg->cbndx; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 790 } 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 791 280b683ceaceb75 drivers/iommu/arm-smmu.c Robin Murphy 2017-03-30 792 if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 793 cfg->vmid = cfg->cbndx + 1; 280b683ceaceb75 drivers/iommu/arm-smmu.c Robin Murphy 2017-03-30 794 else ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 795 cfg->asid = cfg->cbndx; ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 796 ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 797 smmu_domain->smmu = smmu; ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 798 if (smmu->impl && smmu->impl->init_context) { ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 799 ret = smmu->impl->init_context(smmu_domain); ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 800 if (ret) ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 801 goto out_unlock; ba7e4a08bbf7441 drivers/iommu/arm-smmu.c Robin Murphy 2019-08-15 802 } 280b683ceaceb75 drivers/iommu/arm-smmu.c Robin Murphy 2017-03-30 803 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 804 pgtbl_cfg = (struct io_pgtable_cfg) { d546635731317a5 drivers/iommu/arm-smmu.c Robin Murphy 2016-05-09 805 .pgsize_bitmap = smmu->pgsize_bitmap, 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 806 .ias = ias, 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 807 .oas = oas, 4f41845b340783e drivers/iommu/arm-smmu.c Will Deacon 2019-06-25 808 .coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK, 696bcfb70986207 drivers/iommu/arm-smmu.c Robin Murphy 2019-09-18 809 .tlb = smmu_domain->flush_ops, 2df7a25ce4a7909 drivers/iommu/arm-smmu.c Robin Murphy 2015-07-29 810 .iommu_dev = smmu->dev, 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 811 }; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 812 44f6876a00e83df drivers/iommu/arm-smmu.c Robin Murphy 2018-09-20 813 if (smmu_domain->non_strict) 44f6876a00e83df drivers/iommu/arm-smmu.c Robin Murphy 2018-09-20 814 pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; 44f6876a00e83df drivers/iommu/arm-smmu.c Robin Murphy 2018-09-20 815 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 816 pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain); 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 817 if (!pgtbl_ops) { 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 818 ret = -ENOMEM; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 819 goto out_clear_smmu; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 820 } 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 821 d546635731317a5 drivers/iommu/arm-smmu.c Robin Murphy 2016-05-09 822 /* Update the domain's page sizes to reflect the page table format */ d546635731317a5 drivers/iommu/arm-smmu.c Robin Murphy 2016-05-09 823 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; 455eb7d34ad11b0 drivers/iommu/arm-smmu.c Robin Murphy 2016-09-12 824 domain->geometry.aperture_end = (1UL << ias) - 1; 455eb7d34ad11b0 drivers/iommu/arm-smmu.c Robin Murphy 2016-09-12 825 domain->geometry.force_aperture = true; 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 826 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 827 /* Initialise the context bank with our page table cfg */ 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 828 arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg); 90df373cc62e527 drivers/iommu/arm-smmu.c Robin Murphy 2017-08-08 829 arm_smmu_write_context_bank(smmu, cfg->cbndx); a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 830 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 831 /* 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 832 * Request context fault interrupt. Do this last to avoid the 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 833 * handler seeing a half-initialised domain state. 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 834 */ 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 835 irq = smmu->irqs[smmu->num_global_irqs + cfg->irptndx]; aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 836 aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 837 if (smmu->impl && smmu->impl->context_fault) aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 838 context_fault = smmu->impl->context_fault; aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 839 else aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 840 context_fault = arm_smmu_context_fault; aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 841 aa7ec73297df57a drivers/iommu/arm-smmu.c Krishna Reddy 2020-07-18 842 ret = devm_request_irq(smmu->dev, irq, context_fault, bee140044579fbf drivers/iommu/arm-smmu.c Peng Fan 2016-07-04 843 IRQF_SHARED, "arm-smmu-context-fault", domain); 287980e49ffc0f6 drivers/iommu/arm-smmu.c Arnd Bergmann 2016-05-27 844 if (ret < 0) { 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 845 dev_err(smmu->dev, "failed to request context IRQ %d (%u)\n", 44680eedf9409da drivers/iommu/arm-smmu.c Will Deacon 2014-06-25 846 cfg->irptndx, irq); fba6e960772b7b6 drivers/iommu/arm-smmu.c Will Deacon 2020-01-10 847 cfg->irptndx = ARM_SMMU_INVALID_IRPTNDX; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 848 } 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 849 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 850 mutex_unlock(&smmu_domain->init_mutex); 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 851 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 852 /* Publish page table ops for map/unmap */ 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 853 smmu_domain->pgtbl_ops = pgtbl_ops; a9a1b0b53d8b7ca drivers/iommu/arm-smmu.c Will Deacon 2014-05-01 854 return 0; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 855 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 856 out_clear_smmu: 6db7bfb431220d7 drivers/iommu/arm-smmu.c Liu Xiang 2019-09-16 857 __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 858 smmu_domain->smmu = NULL; a18037b27ebd23e drivers/iommu/arm-smmu.c Mitchel Humpherys 2014-07-30 859 out_unlock: 518f7136244c167 drivers/iommu/arm-smmu.c Will Deacon 2014-11-14 860 mutex_unlock(&smmu_domain->init_mutex); 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 861 return ret; 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 862 } 45ae7cff3684ab4 drivers/iommu/arm-smmu.c Will Deacon 2013-06-24 863 :::::: The code at line 682 was first introduced by commit :::::: 61bc671179f19060be883068b6d3d82ae0b24bc0 iommu/arm-smmu: Install bypass S2CRs for IOMMU_DOMAIN_IDENTITY domains :::::: TO: Will Deacon <[email protected]> :::::: CC: Will Deacon <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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