CC: [email protected]
CC: [email protected]
TO: Tiezhu Yang <[email protected]>
CC: Vinod Koul <[email protected]>
CC: Heiko Stuebner <[email protected]>

Hi Tiezhu,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   29c395c77a9a514c5857c45ceae2665e9bd99ac7
commit: 133552bf03edbe3892767a4b64c56e3bed746374 phy: Remove CONFIG_ARCH_* 
check for related subdir in Makefile
date:   8 months ago
:::::: branch date: 6 hours ago
:::::: commit date: 8 months ago
config: parisc-randconfig-m031-20210225 (attached as .config)
compiler: hppa64-linux-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
Reported-by: Dan Carpenter <[email protected]>

smatch warnings:
drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c:251 
inno_dsidphy_pll_calc_rate() warn: 'tmp' 123456789 can't fit into 65535 '_fbdiv'

vim +251 drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c

b7535a3bc0bac7 Wyon Bi        2019-10-24  218  
f0684c1a836770 Heiko Stuebner 2019-11-08  219  static unsigned long 
inno_dsidphy_pll_calc_rate(struct inno_dsidphy *inno,
f0684c1a836770 Heiko Stuebner 2019-11-08  220                                   
        unsigned long rate)
b7535a3bc0bac7 Wyon Bi        2019-10-24  221  {
f0684c1a836770 Heiko Stuebner 2019-11-08  222   unsigned long prate = 
clk_get_rate(inno->ref_clk);
f0684c1a836770 Heiko Stuebner 2019-11-08  223   unsigned long best_freq = 0;
f0684c1a836770 Heiko Stuebner 2019-11-08  224   unsigned long fref, fout;
f0684c1a836770 Heiko Stuebner 2019-11-08  225   u8 min_prediv, max_prediv;
f0684c1a836770 Heiko Stuebner 2019-11-08  226   u8 _prediv, best_prediv = 1;
f0684c1a836770 Heiko Stuebner 2019-11-08  227   u16 _fbdiv, best_fbdiv = 1;
f0684c1a836770 Heiko Stuebner 2019-11-08  228   u32 min_delta = UINT_MAX;
f0684c1a836770 Heiko Stuebner 2019-11-08  229  
f0684c1a836770 Heiko Stuebner 2019-11-08  230   /*
f0684c1a836770 Heiko Stuebner 2019-11-08  231    * The PLL output frequency can 
be calculated using a simple formula:
f0684c1a836770 Heiko Stuebner 2019-11-08  232    * PLL_Output_Frequency = (FREF 
/ PREDIV * FBDIV) / 2
f0684c1a836770 Heiko Stuebner 2019-11-08  233    * PLL_Output_Frequency: it is 
equal to DDR-Clock-Frequency * 2
f0684c1a836770 Heiko Stuebner 2019-11-08  234    */
f0684c1a836770 Heiko Stuebner 2019-11-08  235   fref = prate / 2;
f0684c1a836770 Heiko Stuebner 2019-11-08  236   if (rate > 1000000000UL)
f0684c1a836770 Heiko Stuebner 2019-11-08  237           fout = 1000000000UL;
f0684c1a836770 Heiko Stuebner 2019-11-08  238   else
f0684c1a836770 Heiko Stuebner 2019-11-08  239           fout = rate;
f0684c1a836770 Heiko Stuebner 2019-11-08  240  
f0684c1a836770 Heiko Stuebner 2019-11-08  241   /* 5Mhz < Fref / prediv < 40MHz 
*/
f0684c1a836770 Heiko Stuebner 2019-11-08  242   min_prediv = DIV_ROUND_UP(fref, 
40000000);
f0684c1a836770 Heiko Stuebner 2019-11-08  243   max_prediv = fref / 5000000;
f0684c1a836770 Heiko Stuebner 2019-11-08  244  
f0684c1a836770 Heiko Stuebner 2019-11-08  245   for (_prediv = min_prediv; 
_prediv <= max_prediv; _prediv++) {
f0684c1a836770 Heiko Stuebner 2019-11-08  246           u64 tmp;
f0684c1a836770 Heiko Stuebner 2019-11-08  247           u32 delta;
f0684c1a836770 Heiko Stuebner 2019-11-08  248  
f0684c1a836770 Heiko Stuebner 2019-11-08  249           tmp = (u64)fout * 
_prediv;
f0684c1a836770 Heiko Stuebner 2019-11-08  250           do_div(tmp, fref);
f0684c1a836770 Heiko Stuebner 2019-11-08 @251           _fbdiv = tmp;
f0684c1a836770 Heiko Stuebner 2019-11-08  252  
f0684c1a836770 Heiko Stuebner 2019-11-08  253           /*
f0684c1a836770 Heiko Stuebner 2019-11-08  254            * The possible 
settings of feedback divider are
f0684c1a836770 Heiko Stuebner 2019-11-08  255            * 12, 13, 14, 16, ~ 511
f0684c1a836770 Heiko Stuebner 2019-11-08  256            */
f0684c1a836770 Heiko Stuebner 2019-11-08  257           if (_fbdiv == 15)
f0684c1a836770 Heiko Stuebner 2019-11-08  258                   continue;
f0684c1a836770 Heiko Stuebner 2019-11-08  259  
f0684c1a836770 Heiko Stuebner 2019-11-08  260           if (_fbdiv < 12 || 
_fbdiv > 511)
f0684c1a836770 Heiko Stuebner 2019-11-08  261                   continue;
f0684c1a836770 Heiko Stuebner 2019-11-08  262  
f0684c1a836770 Heiko Stuebner 2019-11-08  263           tmp = (u64)_fbdiv * 
fref;
f0684c1a836770 Heiko Stuebner 2019-11-08  264           do_div(tmp, _prediv);
f0684c1a836770 Heiko Stuebner 2019-11-08  265  
f0684c1a836770 Heiko Stuebner 2019-11-08  266           delta = abs(fout - tmp);
f0684c1a836770 Heiko Stuebner 2019-11-08  267           if (!delta) {
f0684c1a836770 Heiko Stuebner 2019-11-08  268                   best_prediv = 
_prediv;
f0684c1a836770 Heiko Stuebner 2019-11-08  269                   best_fbdiv = 
_fbdiv;
f0684c1a836770 Heiko Stuebner 2019-11-08  270                   best_freq = tmp;
f0684c1a836770 Heiko Stuebner 2019-11-08  271                   break;
f0684c1a836770 Heiko Stuebner 2019-11-08  272           } else if (delta < 
min_delta) {
f0684c1a836770 Heiko Stuebner 2019-11-08  273                   best_prediv = 
_prediv;
f0684c1a836770 Heiko Stuebner 2019-11-08  274                   best_fbdiv = 
_fbdiv;
f0684c1a836770 Heiko Stuebner 2019-11-08  275                   best_freq = tmp;
f0684c1a836770 Heiko Stuebner 2019-11-08  276                   min_delta = 
delta;
f0684c1a836770 Heiko Stuebner 2019-11-08  277           }
f0684c1a836770 Heiko Stuebner 2019-11-08  278   }
f0684c1a836770 Heiko Stuebner 2019-11-08  279  
f0684c1a836770 Heiko Stuebner 2019-11-08  280   if (best_freq) {
f0684c1a836770 Heiko Stuebner 2019-11-08  281           inno->pll.prediv = 
best_prediv;
f0684c1a836770 Heiko Stuebner 2019-11-08  282           inno->pll.fbdiv = 
best_fbdiv;
f0684c1a836770 Heiko Stuebner 2019-11-08  283           inno->pll.rate = 
best_freq;
f0684c1a836770 Heiko Stuebner 2019-11-08  284   }
f0684c1a836770 Heiko Stuebner 2019-11-08  285  
f0684c1a836770 Heiko Stuebner 2019-11-08  286   return best_freq;
b7535a3bc0bac7 Wyon Bi        2019-10-24  287  }
b7535a3bc0bac7 Wyon Bi        2019-10-24  288  

:::::: The code at line 251 was first introduced by commit
:::::: f0684c1a836770afba7a7097e61935edd69693bf phy/rockchip: inno-dsidphy: 
generalize parameter handling

:::::: TO: Heiko Stuebner <[email protected]>
:::::: CC: Kishon Vijay Abraham I <[email protected]>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

Attachment: .config.gz
Description: application/gzip

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