CC: [email protected]
TO: Oded Gabbay <[email protected]>

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux.git next
head:   e2cf8e918e2e521e3c832b533d1c35d7b29e89a9
commit: 926780e9e1827151ea9020794937bf8ca9bb64f2 [31/32] habanalabs/gaudi: add 
debugfs to DMA from the device
:::::: branch date: 4 hours ago
:::::: commit date: 5 hours ago
config: i386-randconfig-m021-20210401 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
Reported-by: Dan Carpenter <[email protected]>

New smatch warnings:
drivers/misc/habanalabs/gaudi/gaudi.c:6333 gaudi_debugfs_read_dma() error: 
uninitialized symbol 'rc'.

Old smatch warnings:
drivers/misc/habanalabs/gaudi/gaudi.c:8319 gaudi_internal_cb_pool_init() warn: 
missing error code 'rc'

vim +/rc +6333 drivers/misc/habanalabs/gaudi/gaudi.c

926780e9e18271 Oded Gabbay 2021-04-02  6224  
926780e9e18271 Oded Gabbay 2021-04-02  6225  int gaudi_debugfs_read_dma(struct 
hl_device *hdev, u64 addr, u32 size,
926780e9e18271 Oded Gabbay 2021-04-02  6226                             void 
*blob_addr)
926780e9e18271 Oded Gabbay 2021-04-02  6227  {
926780e9e18271 Oded Gabbay 2021-04-02  6228     u32 dma_core_sts0, err_cause, 
cfg1, size_left, pos, size_to_dma;
926780e9e18271 Oded Gabbay 2021-04-02  6229     struct gaudi_device *gaudi = 
hdev->asic_specific;
926780e9e18271 Oded Gabbay 2021-04-02  6230     u64 dma_offset, qm_offset;
926780e9e18271 Oded Gabbay 2021-04-02  6231     dma_addr_t dma_addr;
926780e9e18271 Oded Gabbay 2021-04-02  6232     void *kernel_addr;
926780e9e18271 Oded Gabbay 2021-04-02  6233     bool is_eng_idle;
926780e9e18271 Oded Gabbay 2021-04-02  6234     int rc, dma_id;
926780e9e18271 Oded Gabbay 2021-04-02  6235  
926780e9e18271 Oded Gabbay 2021-04-02  6236     kernel_addr = 
hdev->asic_funcs->asic_dma_alloc_coherent(
926780e9e18271 Oded Gabbay 2021-04-02  6237                                     
        hdev, SZ_2M,
926780e9e18271 Oded Gabbay 2021-04-02  6238                                     
        &dma_addr,
926780e9e18271 Oded Gabbay 2021-04-02  6239                                     
        GFP_KERNEL | __GFP_ZERO);
926780e9e18271 Oded Gabbay 2021-04-02  6240  
926780e9e18271 Oded Gabbay 2021-04-02  6241     if (!kernel_addr)
926780e9e18271 Oded Gabbay 2021-04-02  6242             return -ENOMEM;
926780e9e18271 Oded Gabbay 2021-04-02  6243  
926780e9e18271 Oded Gabbay 2021-04-02  6244     
mutex_lock(&gaudi->clk_gate_mutex);
926780e9e18271 Oded Gabbay 2021-04-02  6245  
926780e9e18271 Oded Gabbay 2021-04-02  6246     
hdev->asic_funcs->disable_clock_gating(hdev);
926780e9e18271 Oded Gabbay 2021-04-02  6247  
926780e9e18271 Oded Gabbay 2021-04-02  6248     
hdev->asic_funcs->hw_queues_lock(hdev);
926780e9e18271 Oded Gabbay 2021-04-02  6249  
926780e9e18271 Oded Gabbay 2021-04-02  6250     dma_id = 
gaudi_dma_assignment[GAUDI_PCI_DMA_1];
926780e9e18271 Oded Gabbay 2021-04-02  6251     dma_offset = dma_id * 
DMA_CORE_OFFSET;
926780e9e18271 Oded Gabbay 2021-04-02  6252     qm_offset = dma_id * 
DMA_QMAN_OFFSET;
926780e9e18271 Oded Gabbay 2021-04-02  6253     dma_core_sts0 = 
RREG32(mmDMA0_CORE_STS0 + dma_offset);
926780e9e18271 Oded Gabbay 2021-04-02  6254     is_eng_idle = 
IS_DMA_IDLE(dma_core_sts0);
926780e9e18271 Oded Gabbay 2021-04-02  6255  
926780e9e18271 Oded Gabbay 2021-04-02  6256     if (!is_eng_idle) {
926780e9e18271 Oded Gabbay 2021-04-02  6257             dma_id = 
gaudi_dma_assignment[GAUDI_PCI_DMA_2];
926780e9e18271 Oded Gabbay 2021-04-02  6258             dma_offset = dma_id * 
DMA_CORE_OFFSET;
926780e9e18271 Oded Gabbay 2021-04-02  6259             qm_offset = dma_id * 
DMA_QMAN_OFFSET;
926780e9e18271 Oded Gabbay 2021-04-02  6260             dma_core_sts0 = 
RREG32(mmDMA0_CORE_STS0 + dma_offset);
926780e9e18271 Oded Gabbay 2021-04-02  6261             is_eng_idle = 
IS_DMA_IDLE(dma_core_sts0);
926780e9e18271 Oded Gabbay 2021-04-02  6262  
926780e9e18271 Oded Gabbay 2021-04-02  6263             if (!is_eng_idle) {
926780e9e18271 Oded Gabbay 2021-04-02  6264                     
dev_err_ratelimited(hdev->dev,
926780e9e18271 Oded Gabbay 2021-04-02  6265                             "Can't 
read via DMA because it is BUSY\n");
926780e9e18271 Oded Gabbay 2021-04-02  6266                     rc = -EAGAIN;
926780e9e18271 Oded Gabbay 2021-04-02  6267                     goto out;
926780e9e18271 Oded Gabbay 2021-04-02  6268             }
926780e9e18271 Oded Gabbay 2021-04-02  6269     }
926780e9e18271 Oded Gabbay 2021-04-02  6270  
926780e9e18271 Oded Gabbay 2021-04-02  6271     cfg1 = 
RREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset);
926780e9e18271 Oded Gabbay 2021-04-02  6272     WREG32(mmDMA0_QM_GLBL_CFG1 + 
qm_offset,
926780e9e18271 Oded Gabbay 2021-04-02  6273                     0xF << 
DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);
926780e9e18271 Oded Gabbay 2021-04-02  6274  
926780e9e18271 Oded Gabbay 2021-04-02  6275     /* TODO: remove this by mapping 
the DMA temporary buffer to the MMU
926780e9e18271 Oded Gabbay 2021-04-02  6276      * using the compute ctx ASID, 
if exists. If not, use the kernel ctx
926780e9e18271 Oded Gabbay 2021-04-02  6277      * ASID
926780e9e18271 Oded Gabbay 2021-04-02  6278      */
926780e9e18271 Oded Gabbay 2021-04-02  6279     WREG32_OR(mmDMA0_CORE_PROT + 
dma_offset, BIT(DMA0_CORE_PROT_VAL_SHIFT));
926780e9e18271 Oded Gabbay 2021-04-02  6280  
926780e9e18271 Oded Gabbay 2021-04-02  6281     /* Verify DMA is OK */
926780e9e18271 Oded Gabbay 2021-04-02  6282     err_cause = 
RREG32(mmDMA0_CORE_ERR_CAUSE + dma_offset);
926780e9e18271 Oded Gabbay 2021-04-02  6283     if (err_cause) {
926780e9e18271 Oded Gabbay 2021-04-02  6284             dev_dbg(hdev->dev,
926780e9e18271 Oded Gabbay 2021-04-02  6285                     "Clearing DMA0 
engine from errors (cause 0x%x)\n",
926780e9e18271 Oded Gabbay 2021-04-02  6286                     err_cause);
926780e9e18271 Oded Gabbay 2021-04-02  6287             
WREG32(mmDMA0_CORE_ERR_CAUSE + dma_offset, err_cause);
926780e9e18271 Oded Gabbay 2021-04-02  6288     }
926780e9e18271 Oded Gabbay 2021-04-02  6289  
926780e9e18271 Oded Gabbay 2021-04-02  6290     pos = 0;
926780e9e18271 Oded Gabbay 2021-04-02  6291     size_left = size;
926780e9e18271 Oded Gabbay 2021-04-02  6292     size_to_dma = SZ_2M;
926780e9e18271 Oded Gabbay 2021-04-02  6293  
926780e9e18271 Oded Gabbay 2021-04-02  6294     while (size_left > 0) {
926780e9e18271 Oded Gabbay 2021-04-02  6295  
926780e9e18271 Oded Gabbay 2021-04-02  6296             if (size_left < SZ_2M)
926780e9e18271 Oded Gabbay 2021-04-02  6297                     size_to_dma = 
size_left;
926780e9e18271 Oded Gabbay 2021-04-02  6298  
926780e9e18271 Oded Gabbay 2021-04-02  6299             rc = 
gaudi_dma_core_transfer(hdev, dma_id, addr, size_to_dma,
926780e9e18271 Oded Gabbay 2021-04-02  6300                                     
        dma_addr);
926780e9e18271 Oded Gabbay 2021-04-02  6301             if (rc)
926780e9e18271 Oded Gabbay 2021-04-02  6302                     break;
926780e9e18271 Oded Gabbay 2021-04-02  6303  
926780e9e18271 Oded Gabbay 2021-04-02  6304             memcpy(blob_addr + pos, 
kernel_addr, size_to_dma);
926780e9e18271 Oded Gabbay 2021-04-02  6305  
926780e9e18271 Oded Gabbay 2021-04-02  6306             if (size_left <= SZ_2M)
926780e9e18271 Oded Gabbay 2021-04-02  6307                     break;
926780e9e18271 Oded Gabbay 2021-04-02  6308  
926780e9e18271 Oded Gabbay 2021-04-02  6309             pos += SZ_2M;
926780e9e18271 Oded Gabbay 2021-04-02  6310             addr += SZ_2M;
926780e9e18271 Oded Gabbay 2021-04-02  6311             size_left -= SZ_2M;
926780e9e18271 Oded Gabbay 2021-04-02  6312     }
926780e9e18271 Oded Gabbay 2021-04-02  6313  
926780e9e18271 Oded Gabbay 2021-04-02  6314     /* TODO: remove this by mapping 
the DMA temporary buffer to the MMU
926780e9e18271 Oded Gabbay 2021-04-02  6315      * using the compute ctx ASID, 
if exists. If not, use the kernel ctx
926780e9e18271 Oded Gabbay 2021-04-02  6316      * ASID
926780e9e18271 Oded Gabbay 2021-04-02  6317      */
926780e9e18271 Oded Gabbay 2021-04-02  6318     WREG32_AND(mmDMA0_CORE_PROT + 
dma_offset,
926780e9e18271 Oded Gabbay 2021-04-02  6319                     
~BIT(DMA0_CORE_PROT_VAL_SHIFT));
926780e9e18271 Oded Gabbay 2021-04-02  6320  
926780e9e18271 Oded Gabbay 2021-04-02  6321     WREG32(mmDMA0_QM_GLBL_CFG1 + 
qm_offset, cfg1);
926780e9e18271 Oded Gabbay 2021-04-02  6322  
926780e9e18271 Oded Gabbay 2021-04-02  6323  out:
926780e9e18271 Oded Gabbay 2021-04-02  6324     
hdev->asic_funcs->hw_queues_unlock(hdev);
926780e9e18271 Oded Gabbay 2021-04-02  6325  
926780e9e18271 Oded Gabbay 2021-04-02  6326     
hdev->asic_funcs->set_clock_gating(hdev);
926780e9e18271 Oded Gabbay 2021-04-02  6327  
926780e9e18271 Oded Gabbay 2021-04-02  6328     
mutex_unlock(&gaudi->clk_gate_mutex);
926780e9e18271 Oded Gabbay 2021-04-02  6329  
926780e9e18271 Oded Gabbay 2021-04-02  6330     
hdev->asic_funcs->asic_dma_free_coherent(hdev, SZ_2M, kernel_addr,
926780e9e18271 Oded Gabbay 2021-04-02  6331                                     
        dma_addr);
926780e9e18271 Oded Gabbay 2021-04-02  6332  
926780e9e18271 Oded Gabbay 2021-04-02 @6333     return rc;
926780e9e18271 Oded Gabbay 2021-04-02  6334  }
926780e9e18271 Oded Gabbay 2021-04-02  6335  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

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