CC: [email protected]
CC: [email protected]
TO: AngeloGioacchino Del Regno <[email protected]>
CC: Rob Clark <[email protected]>

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   2d743660786ec51f5c1fefd5782bbdee7b227db0
commit: 196145eb1af18efb3fc6dd1e40cfc4dc47e47603 drm/msm/dsi_pll_10nm: Solve 
TODO for multiplier frac_bits assignment
date:   9 weeks ago
:::::: branch date: 14 hours ago
:::::: commit date: 9 weeks ago
config: arm64-randconfig-m031-20210407 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
Reported-by: Dan Carpenter <[email protected]>

New smatch warnings:
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c:506 dsi_pll_10nm_vco_recalc_rate() 
warn: should '1 << config->frac_bits' be a 64 bit type?

Old smatch warnings:
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c:173 dsi_pll_calc_dec_frac() warn: 
should '1 << config->frac_bits' be a 64 bit type?
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c:220 dsi_pll_calc_ssc() warn: should 
'1 << config->frac_bits' be a 64 bit type?

vim +506 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c

28e4309ab9c2ba Archit Taneja              2018-01-17  478  
973e02db35c2c4 Archit Taneja              2018-01-17  479  static unsigned long 
dsi_pll_10nm_vco_recalc_rate(struct clk_hw *hw,
973e02db35c2c4 Archit Taneja              2018-01-17  480                       
                          unsigned long parent_rate)
973e02db35c2c4 Archit Taneja              2018-01-17  481  {
973e02db35c2c4 Archit Taneja              2018-01-17  482       struct 
msm_dsi_pll *pll = hw_clk_to_pll(hw);
973e02db35c2c4 Archit Taneja              2018-01-17  483       struct 
dsi_pll_10nm *pll_10nm = to_pll_10nm(pll);
196145eb1af18e AngeloGioacchino Del Regno 2021-01-09  484       struct 
dsi_pll_config *config = &pll_10nm->pll_configuration;
28e4309ab9c2ba Archit Taneja              2018-01-17  485       void __iomem 
*base = pll_10nm->mmio;
28e4309ab9c2ba Archit Taneja              2018-01-17  486       u64 ref_clk = 
pll_10nm->vco_ref_clk_rate;
973e02db35c2c4 Archit Taneja              2018-01-17  487       u64 vco_rate = 
0x0;
28e4309ab9c2ba Archit Taneja              2018-01-17  488       u64 multiplier;
28e4309ab9c2ba Archit Taneja              2018-01-17  489       u32 frac;
28e4309ab9c2ba Archit Taneja              2018-01-17  490       u32 dec;
28e4309ab9c2ba Archit Taneja              2018-01-17  491       u64 pll_freq, 
tmp64;
28e4309ab9c2ba Archit Taneja              2018-01-17  492  
28e4309ab9c2ba Archit Taneja              2018-01-17  493       dec = 
pll_read(base + REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1);
28e4309ab9c2ba Archit Taneja              2018-01-17  494       dec &= 0xff;
28e4309ab9c2ba Archit Taneja              2018-01-17  495  
28e4309ab9c2ba Archit Taneja              2018-01-17  496       frac = 
pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_LOW_1);
28e4309ab9c2ba Archit Taneja              2018-01-17  497       frac |= 
((pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_MID_1) &
28e4309ab9c2ba Archit Taneja              2018-01-17  498                 0xff) 
<< 8);
28e4309ab9c2ba Archit Taneja              2018-01-17  499       frac |= 
((pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_HIGH_1) &
28e4309ab9c2ba Archit Taneja              2018-01-17  500                 0x3) 
<< 16);
973e02db35c2c4 Archit Taneja              2018-01-17  501  
28e4309ab9c2ba Archit Taneja              2018-01-17  502       /*
28e4309ab9c2ba Archit Taneja              2018-01-17  503        * TODO:
28e4309ab9c2ba Archit Taneja              2018-01-17  504        *      1. 
Assumes prescaler is disabled
28e4309ab9c2ba Archit Taneja              2018-01-17  505        */
196145eb1af18e AngeloGioacchino Del Regno 2021-01-09 @506       multiplier = 1 
<< config->frac_bits;
28e4309ab9c2ba Archit Taneja              2018-01-17  507       pll_freq = dec 
* (ref_clk * 2);
28e4309ab9c2ba Archit Taneja              2018-01-17  508       tmp64 = 
(ref_clk * 2 * frac);
28e4309ab9c2ba Archit Taneja              2018-01-17  509       pll_freq += 
div_u64(tmp64, multiplier);
28e4309ab9c2ba Archit Taneja              2018-01-17  510  
28e4309ab9c2ba Archit Taneja              2018-01-17  511       vco_rate = 
pll_freq;
28e4309ab9c2ba Archit Taneja              2018-01-17  512  
28e4309ab9c2ba Archit Taneja              2018-01-17  513       DBG("DSI PLL%d 
returning vco rate = %lu, dec = %x, frac = %x",
28e4309ab9c2ba Archit Taneja              2018-01-17  514           
pll_10nm->id, (unsigned long)vco_rate, dec, frac);
973e02db35c2c4 Archit Taneja              2018-01-17  515  
973e02db35c2c4 Archit Taneja              2018-01-17  516       return 
(unsigned long)vco_rate;
973e02db35c2c4 Archit Taneja              2018-01-17  517  }
973e02db35c2c4 Archit Taneja              2018-01-17  518  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]

Attachment: .config.gz
Description: application/gzip

_______________________________________________
kbuild mailing list -- [email protected]
To unsubscribe send an email to [email protected]

Reply via email to