CC: [email protected] CC: [email protected] TO: Srinivas Kandagatla <[email protected]> CC: Mark Brown <[email protected]> CC: "Pierre-Louis Bossart" <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: ad347abe4a9876b1f65f408ab467137e88f77eb4 commit: 2c4066e5d428d47a28f87407b3d73ebe40c06fd4 ASoC: codecs: lpass-wsa-macro: add dapm widgets and route date: 7 months ago :::::: branch date: 12 hours ago :::::: commit date: 7 months ago config: i386-randconfig-m021-20210612 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> New smatch warnings: sound/soc/codecs/lpass-wsa-macro.c:1168 wsa_macro_enable_vi_feedback() error: uninitialized symbol 'tx_reg0'. sound/soc/codecs/lpass-wsa-macro.c:1171 wsa_macro_enable_vi_feedback() error: uninitialized symbol 'tx_reg1'. sound/soc/codecs/lpass-wsa-macro.c:1261 wsa_macro_hd2_control() error: uninitialized symbol 'hd2_enable_reg'. sound/soc/codecs/lpass-wsa-macro.c:1262 wsa_macro_hd2_control() error: uninitialized symbol 'hd2_scale_reg'. sound/soc/codecs/lpass-wsa-macro.c:1593 wsa_macro_enable_interpolator() error: uninitialized symbol 'reg'. sound/soc/codecs/lpass-wsa-macro.c:1620 wsa_macro_enable_interpolator() error: uninitialized symbol 'gain_reg'. sound/soc/codecs/lpass-wsa-macro.c:1684 wsa_macro_spk_boost_event() error: uninitialized symbol 'boost_path_cfg1'. sound/soc/codecs/lpass-wsa-macro.c:1687 wsa_macro_spk_boost_event() error: uninitialized symbol 'boost_path_ctl'. sound/soc/codecs/lpass-wsa-macro.c:1690 wsa_macro_spk_boost_event() error: uninitialized symbol 'reg_mix'. sound/soc/codecs/lpass-wsa-macro.c:1695 wsa_macro_spk_boost_event() error: uninitialized symbol 'reg'. sound/soc/codecs/lpass-wsa-macro.c:1731 wsa_macro_enable_echo() error: uninitialized symbol 'ec_tx'. Old smatch warnings: sound/soc/codecs/lpass-wsa-macro.c:1195 wsa_macro_enable_vi_feedback() error: uninitialized symbol 'tx_reg0'. sound/soc/codecs/lpass-wsa-macro.c:1198 wsa_macro_enable_vi_feedback() error: uninitialized symbol 'tx_reg1'. sound/soc/codecs/lpass-wsa-macro.c:1276 wsa_macro_hd2_control() error: uninitialized symbol 'hd2_scale_reg'. sound/soc/codecs/lpass-wsa-macro.c:1629 wsa_macro_enable_interpolator() error: uninitialized symbol 'reg'. sound/soc/codecs/lpass-wsa-macro.c:1650 wsa_macro_enable_interpolator() error: uninitialized symbol 'gain_reg'. sound/soc/codecs/lpass-wsa-macro.c:1655 wsa_macro_enable_interpolator() error: uninitialized symbol 'gain_reg'. sound/soc/codecs/lpass-wsa-macro.c:1698 wsa_macro_spk_boost_event() error: uninitialized symbol 'boost_path_ctl'. sound/soc/codecs/lpass-wsa-macro.c:1701 wsa_macro_spk_boost_event() error: uninitialized symbol 'boost_path_cfg1'. vim +/tx_reg0 +1168 sound/soc/codecs/lpass-wsa-macro.c 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1148 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1149 static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1150 struct snd_kcontrol *kcontrol, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1151 int event) 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1152 { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1153 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1154 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1155 u32 tx_reg0, tx_reg1; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1156 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1157 if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1158 tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1159 tx_reg1 = CDC_WSA_TX1_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1160 } else if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1161 tx_reg0 = CDC_WSA_TX2_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1162 tx_reg1 = CDC_WSA_TX3_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1163 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1164 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1165 switch (event) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1166 case SND_SOC_DAPM_POST_PMU: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1167 /* Enable V&I sensing */ 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 @1168 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1169 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1170 CDC_WSA_TX_SPKR_PROT_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 @1171 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1172 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1173 CDC_WSA_TX_SPKR_PROT_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1174 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1175 CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1176 CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1177 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1178 CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1179 CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1180 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1181 CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1182 CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1183 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1184 CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1185 CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1186 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1187 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1188 CDC_WSA_TX_SPKR_PROT_NO_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1189 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1190 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1191 CDC_WSA_TX_SPKR_PROT_NO_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1192 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1193 case SND_SOC_DAPM_POST_PMD: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1194 /* Disable V&I sensing */ 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1195 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1196 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1197 CDC_WSA_TX_SPKR_PROT_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1198 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1199 CDC_WSA_TX_SPKR_PROT_RESET_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1200 CDC_WSA_TX_SPKR_PROT_RESET); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1201 snd_soc_component_update_bits(component, tx_reg0, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1202 CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1203 CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1204 snd_soc_component_update_bits(component, tx_reg1, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1205 CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1206 CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1207 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1208 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1209 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1210 return 0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1211 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1212 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1213 static int wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1214 struct snd_kcontrol *kcontrol, int event) 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1215 { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1216 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1217 u16 gain_reg; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1218 int val; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1219 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1220 switch (w->reg) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1221 case CDC_WSA_RX0_RX_PATH_MIX_CTL: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1222 gain_reg = CDC_WSA_RX0_RX_VOL_MIX_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1223 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1224 case CDC_WSA_RX1_RX_PATH_MIX_CTL: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1225 gain_reg = CDC_WSA_RX1_RX_VOL_MIX_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1226 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1227 default: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1228 return 0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1229 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1230 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1231 switch (event) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1232 case SND_SOC_DAPM_POST_PMU: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1233 val = snd_soc_component_read(component, gain_reg); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1234 snd_soc_component_write(component, gain_reg, val); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1235 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1236 case SND_SOC_DAPM_POST_PMD: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1237 snd_soc_component_update_bits(component, w->reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1238 CDC_WSA_RX_PATH_MIX_CLK_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1239 CDC_WSA_RX_PATH_MIX_CLK_DISABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1240 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1241 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1242 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1243 return 0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1244 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1245 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1246 static void wsa_macro_hd2_control(struct snd_soc_component *component, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1247 u16 reg, int event) 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1248 { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1249 u16 hd2_scale_reg; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1250 u16 hd2_enable_reg; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1251 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1252 if (reg == CDC_WSA_RX0_RX_PATH_CTL) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1253 hd2_scale_reg = CDC_WSA_RX0_RX_PATH_SEC3; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1254 hd2_enable_reg = CDC_WSA_RX0_RX_PATH_CFG0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1255 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1256 if (reg == CDC_WSA_RX1_RX_PATH_CTL) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1257 hd2_scale_reg = CDC_WSA_RX1_RX_PATH_SEC3; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1258 hd2_enable_reg = CDC_WSA_RX1_RX_PATH_CFG0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1259 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1260 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 @1261 if (hd2_enable_reg && SND_SOC_DAPM_EVENT_ON(event)) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 @1262 snd_soc_component_update_bits(component, hd2_scale_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1263 CDC_WSA_RX_PATH_HD2_ALPHA_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1264 0x10); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1265 snd_soc_component_update_bits(component, hd2_scale_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1266 CDC_WSA_RX_PATH_HD2_SCALE_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1267 0x1); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1268 snd_soc_component_update_bits(component, hd2_enable_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1269 CDC_WSA_RX_PATH_HD2_EN_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1270 CDC_WSA_RX_PATH_HD2_ENABLE); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1271 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1272 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1273 if (hd2_enable_reg && SND_SOC_DAPM_EVENT_OFF(event)) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1274 snd_soc_component_update_bits(component, hd2_enable_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1275 CDC_WSA_RX_PATH_HD2_EN_MASK, 0); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1276 snd_soc_component_update_bits(component, hd2_scale_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1277 CDC_WSA_RX_PATH_HD2_SCALE_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1278 0); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1279 snd_soc_component_update_bits(component, hd2_scale_reg, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1280 CDC_WSA_RX_PATH_HD2_ALPHA_MASK, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1281 0); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1282 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1283 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1284 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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