CC: [email protected] CC: [email protected] TO: Miquel Raynal <[email protected]> CC: Boris Brezillon <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 94f0b2d4a1d0c52035aef425da5e022bd2cb1c71 commit: 4c46667b3d67253604ee42840917844548c86657 mtd: rawnand: s/data_interface/interface_config/ date: 12 months ago :::::: branch date: 22 hours ago :::::: commit date: 12 months ago config: xtensa-randconfig-m031-20210615 (attached as .config) compiler: xtensa-linux-gcc (GCC) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/mtd/nand/raw/marvell_nand.c:2323 marvell_nfc_setup_interface() warn: passing a valid pointer to 'PTR_ERR' vim +/PTR_ERR +2323 drivers/mtd/nand/raw/marvell_nand.c 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2310 4c46667b3d6725 drivers/mtd/nand/raw/marvell_nand.c Miquel Raynal 2020-05-29 2311 static int marvell_nfc_setup_interface(struct nand_chip *chip, int chipnr, 4c46667b3d6725 drivers/mtd/nand/raw/marvell_nand.c Miquel Raynal 2020-05-29 2312 const struct nand_interface_config *conf) 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2313 { 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2314 struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2315 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); 6b6de6543dd504 drivers/mtd/nand/raw/marvell_nand.c Boris Brezillon 2018-03-26 2316 unsigned int period_ns = 1000000000 / clk_get_rate(nfc->core_clk) * 2; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2317 const struct nand_sdr_timings *sdr; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2318 struct marvell_nfc_timings nfc_tmg; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2319 int read_delay; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2320 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2321 sdr = nand_get_sdr_timings(conf); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2322 if (IS_ERR(sdr)) 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 @2323 return PTR_ERR(sdr); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2324 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2325 /* 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2326 * SDR timings are given in pico-seconds while NFC timings must be 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2327 * expressed in NAND controller clock cycles, which is half of the 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2328 * frequency of the accessible ECC clock retrieved by clk_get_rate(). 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2329 * This is not written anywhere in the datasheet but was observed 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2330 * with an oscilloscope. 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2331 * 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2332 * NFC datasheet gives equations from which thoses calculations 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2333 * are derived, they tend to be slightly more restrictives than the 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2334 * given core timings and may improve the overall speed. 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2335 */ 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2336 nfc_tmg.tRP = TO_CYCLES(DIV_ROUND_UP(sdr->tRC_min, 2), period_ns) - 1; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2337 nfc_tmg.tRH = nfc_tmg.tRP; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2338 nfc_tmg.tWP = TO_CYCLES(DIV_ROUND_UP(sdr->tWC_min, 2), period_ns) - 1; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2339 nfc_tmg.tWH = nfc_tmg.tWP; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2340 nfc_tmg.tCS = TO_CYCLES(sdr->tCS_min, period_ns); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2341 nfc_tmg.tCH = TO_CYCLES(sdr->tCH_min, period_ns) - 1; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2342 nfc_tmg.tADL = TO_CYCLES(sdr->tADL_min, period_ns); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2343 /* 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2344 * Read delay is the time of propagation from SoC pins to NFC internal 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2345 * logic. With non-EDO timings, this is MIN_RD_DEL_CNT clock cycles. In 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2346 * EDO mode, an additional delay of tRH must be taken into account so 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2347 * the data is sampled on the falling edge instead of the rising edge. 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2348 */ 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2349 read_delay = sdr->tRC_min >= 30000 ? 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2350 MIN_RD_DEL_CNT : MIN_RD_DEL_CNT + nfc_tmg.tRH; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2351 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2352 nfc_tmg.tAR = TO_CYCLES(sdr->tAR_min, period_ns); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2353 /* 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2354 * tWHR and tRHW are supposed to be read to write delays (and vice 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2355 * versa) but in some cases, ie. when doing a change column, they must 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2356 * be greater than that to be sure tCCS delay is respected. 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2357 */ 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2358 nfc_tmg.tWHR = TO_CYCLES(max_t(int, sdr->tWHR_min, sdr->tCCS_min), 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2359 period_ns) - 2, 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2360 nfc_tmg.tRHW = TO_CYCLES(max_t(int, sdr->tRHW_min, sdr->tCCS_min), 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2361 period_ns); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2362 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2363 /* 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2364 * NFCv2: Use WAIT_MODE (wait for RB line), do not rely only on delays. 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2365 * NFCv1: No WAIT_MODE, tR must be maximal. 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2366 */ 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2367 if (nfc->caps->is_nfcv2) { 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2368 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2369 } else { 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2370 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2371 period_ns); 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2372 if (nfc_tmg.tR + 3 > nfc_tmg.tCH) 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2373 nfc_tmg.tR = nfc_tmg.tCH - 3; 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2374 else 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2375 nfc_tmg.tR = 0; 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2376 } 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2377 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2378 if (chipnr < 0) 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2379 return 0; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2380 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2381 marvell_nand->ndtr0 = 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2382 NDTR0_TRP(nfc_tmg.tRP) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2383 NDTR0_TRH(nfc_tmg.tRH) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2384 NDTR0_ETRP(nfc_tmg.tRP) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2385 NDTR0_TWP(nfc_tmg.tWP) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2386 NDTR0_TWH(nfc_tmg.tWH) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2387 NDTR0_TCS(nfc_tmg.tCS) | 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2388 NDTR0_TCH(nfc_tmg.tCH); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2389 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2390 marvell_nand->ndtr1 = 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2391 NDTR1_TAR(nfc_tmg.tAR) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2392 NDTR1_TWHR(nfc_tmg.tWHR) | 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2393 NDTR1_TR(nfc_tmg.tR); 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2394 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2395 if (nfc->caps->is_nfcv2) { 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2396 marvell_nand->ndtr0 |= 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2397 NDTR0_RD_CNT_DEL(read_delay) | 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2398 NDTR0_SELCNTR | 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2399 NDTR0_TADL(nfc_tmg.tADL); 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2400 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2401 marvell_nand->ndtr1 |= 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2402 NDTR1_TRHW(nfc_tmg.tRHW) | 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2403 NDTR1_WAIT_MODE; 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2404 } 07ad5a72148417 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-17 2405 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2406 return 0; 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2407 } 02f26ecf8c7727 drivers/mtd/nand/marvell_nand.c Miquel Raynal 2018-01-09 2408 :::::: The code at line 2323 was first introduced by commit :::::: 02f26ecf8c772751d4b24744d487f6b1b20e75d4 mtd: nand: add reworked Marvell NAND controller driver :::::: TO: Miquel Raynal <[email protected]> :::::: CC: Boris Brezillon <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
_______________________________________________ kbuild mailing list -- [email protected] To unsubscribe send an email to [email protected]
