CC: [email protected] CC: [email protected] TO: Kees Cook <[email protected]> CC: Chao Yu <[email protected]>, Chao Yu <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: e9f1cbc0c4114880090c7a578117d3b9cf184ad4 commit: 3f649ab728cda8038259d8f14492fe400fbab911 treewide: Remove uninitialized_var() usage date: 12 months ago :::::: branch date: 6 hours ago :::::: commit date: 12 months ago config: ia64-randconfig-m031-20210707 (attached as .config) compiler: ia64-linux-gcc (GCC) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> New smatch warnings: drivers/infiniband/hw/mlx4/qp.c:3795 _mlx4_ib_post_send() error: uninitialized symbol 'lso_hdr_sz'. Old smatch warnings: drivers/infiniband/hw/mlx4/qp.c:1153 create_qp_common() warn: missing error code 'err' drivers/infiniband/hw/mlx4/qp.c:2590 __mlx4_ib_modify_qp() warn: Function too hairy. No more merges. drivers/infiniband/hw/mlx4/qp.c:4301 mlx4_ib_modify_wq() warn: unsigned 'cur_state' is never less than zero. vim +/lso_hdr_sz +3795 drivers/infiniband/hw/mlx4/qp.c 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3532 d34ac5cd3a73aa Bart Van Assche 2018-07-18 3533 static int _mlx4_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, d34ac5cd3a73aa Bart Van Assche 2018-07-18 3534 const struct ib_send_wr **bad_wr, bool drain) 225c7b1feef1b4 Roland Dreier 2007-05-08 3535 { 225c7b1feef1b4 Roland Dreier 2007-05-08 3536 struct mlx4_ib_qp *qp = to_mqp(ibqp); 225c7b1feef1b4 Roland Dreier 2007-05-08 3537 void *wqe; 225c7b1feef1b4 Roland Dreier 2007-05-08 3538 struct mlx4_wqe_ctrl_seg *ctrl; 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3539 struct mlx4_wqe_data_seg *dseg; 225c7b1feef1b4 Roland Dreier 2007-05-08 3540 unsigned long flags; 225c7b1feef1b4 Roland Dreier 2007-05-08 3541 int nreq; 225c7b1feef1b4 Roland Dreier 2007-05-08 3542 int err = 0; ea54b10c777300 Jack Morgenstein 2008-01-28 3543 unsigned ind; 3f649ab728cda8 Kees Cook 2020-06-03 3544 int size; 3f649ab728cda8 Kees Cook 2020-06-03 3545 unsigned seglen; 0fd7e1d8559f45 Roland Dreier 2009-01-16 3546 __be32 dummy; 0fd7e1d8559f45 Roland Dreier 2009-01-16 3547 __be32 *lso_wqe; 3f649ab728cda8 Kees Cook 2020-06-03 3548 __be32 lso_hdr_sz; 417608c20a4c83 Eli Cohen 2009-11-12 3549 __be32 blh; 225c7b1feef1b4 Roland Dreier 2007-05-08 3550 int i; 35f05dabf95ac3 Yishai Hadas 2015-02-08 3551 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 225c7b1feef1b4 Roland Dreier 2007-05-08 3552 e1b866c677d693 Moni Shoua 2016-01-14 3553 if (qp->mlx4_ib_qp_type == MLX4_IB_QPT_GSI) { e1b866c677d693 Moni Shoua 2016-01-14 3554 struct mlx4_ib_sqp *sqp = to_msqp(qp); e1b866c677d693 Moni Shoua 2016-01-14 3555 e1b866c677d693 Moni Shoua 2016-01-14 3556 if (sqp->roce_v2_gsi) { e1b866c677d693 Moni Shoua 2016-01-14 3557 struct mlx4_ib_ah *ah = to_mah(ud_wr(wr)->ah); a748d60df32ec5 Talat Batheesh 2017-02-14 3558 enum ib_gid_type gid_type; e1b866c677d693 Moni Shoua 2016-01-14 3559 union ib_gid gid; e1b866c677d693 Moni Shoua 2016-01-14 3560 a748d60df32ec5 Talat Batheesh 2017-02-14 3561 if (!fill_gid_by_hw_index(mdev, sqp->qp.port, a748d60df32ec5 Talat Batheesh 2017-02-14 3562 ah->av.ib.gid_index, a748d60df32ec5 Talat Batheesh 2017-02-14 3563 &gid, &gid_type)) a748d60df32ec5 Talat Batheesh 2017-02-14 3564 qp = (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) ? e1b866c677d693 Moni Shoua 2016-01-14 3565 to_mqp(sqp->roce_v2_gsi) : qp; a748d60df32ec5 Talat Batheesh 2017-02-14 3566 else e1b866c677d693 Moni Shoua 2016-01-14 3567 pr_err("Failed to get gid at index %d. RoCEv2 will not work properly\n", e1b866c677d693 Moni Shoua 2016-01-14 3568 ah->av.ib.gid_index); e1b866c677d693 Moni Shoua 2016-01-14 3569 } e1b866c677d693 Moni Shoua 2016-01-14 3570 } e1b866c677d693 Moni Shoua 2016-01-14 3571 96db0e0335c798 Roland Dreier 2007-10-30 3572 spin_lock_irqsave(&qp->sq.lock, flags); 1975acd9f3fdc0 Yishai Hadas 2018-06-19 3573 if (mdev->dev->persist->state & MLX4_DEVICE_STATE_INTERNAL_ERROR && 1975acd9f3fdc0 Yishai Hadas 2018-06-19 3574 !drain) { 35f05dabf95ac3 Yishai Hadas 2015-02-08 3575 err = -EIO; 35f05dabf95ac3 Yishai Hadas 2015-02-08 3576 *bad_wr = wr; 35f05dabf95ac3 Yishai Hadas 2015-02-08 3577 nreq = 0; 35f05dabf95ac3 Yishai Hadas 2015-02-08 3578 goto out; 35f05dabf95ac3 Yishai Hadas 2015-02-08 3579 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3580 ea54b10c777300 Jack Morgenstein 2008-01-28 3581 ind = qp->sq_next_wqe; 225c7b1feef1b4 Roland Dreier 2007-05-08 3582 225c7b1feef1b4 Roland Dreier 2007-05-08 3583 for (nreq = 0; wr; ++nreq, wr = wr->next) { 0fd7e1d8559f45 Roland Dreier 2009-01-16 3584 lso_wqe = &dummy; 417608c20a4c83 Eli Cohen 2009-11-12 3585 blh = 0; 0fd7e1d8559f45 Roland Dreier 2009-01-16 3586 225c7b1feef1b4 Roland Dreier 2007-05-08 3587 if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) { 225c7b1feef1b4 Roland Dreier 2007-05-08 3588 err = -ENOMEM; 225c7b1feef1b4 Roland Dreier 2007-05-08 3589 *bad_wr = wr; 225c7b1feef1b4 Roland Dreier 2007-05-08 3590 goto out; 225c7b1feef1b4 Roland Dreier 2007-05-08 3591 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3592 225c7b1feef1b4 Roland Dreier 2007-05-08 3593 if (unlikely(wr->num_sge > qp->sq.max_gs)) { 225c7b1feef1b4 Roland Dreier 2007-05-08 3594 err = -EINVAL; 225c7b1feef1b4 Roland Dreier 2007-05-08 3595 *bad_wr = wr; 225c7b1feef1b4 Roland Dreier 2007-05-08 3596 goto out; 225c7b1feef1b4 Roland Dreier 2007-05-08 3597 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3598 0e6e74162164d9 Roland Dreier 2007-06-18 3599 ctrl = wqe = get_send_wqe(qp, ind & (qp->sq.wqe_cnt - 1)); ea54b10c777300 Jack Morgenstein 2008-01-28 3600 qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] = wr->wr_id; 225c7b1feef1b4 Roland Dreier 2007-05-08 3601 225c7b1feef1b4 Roland Dreier 2007-05-08 3602 ctrl->srcrb_flags = 225c7b1feef1b4 Roland Dreier 2007-05-08 3603 (wr->send_flags & IB_SEND_SIGNALED ? 225c7b1feef1b4 Roland Dreier 2007-05-08 3604 cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE) : 0) | 225c7b1feef1b4 Roland Dreier 2007-05-08 3605 (wr->send_flags & IB_SEND_SOLICITED ? 225c7b1feef1b4 Roland Dreier 2007-05-08 3606 cpu_to_be32(MLX4_WQE_CTRL_SOLICITED) : 0) | 8ff095ec4bce7b Eli Cohen 2008-04-16 3607 ((wr->send_flags & IB_SEND_IP_CSUM) ? 8ff095ec4bce7b Eli Cohen 2008-04-16 3608 cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM | 8ff095ec4bce7b Eli Cohen 2008-04-16 3609 MLX4_WQE_CTRL_TCP_UDP_CSUM) : 0) | 225c7b1feef1b4 Roland Dreier 2007-05-08 3610 qp->sq_signal_bits; 225c7b1feef1b4 Roland Dreier 2007-05-08 3611 95d04f0735b4fc Roland Dreier 2008-07-23 3612 ctrl->imm = send_ieth(wr); 225c7b1feef1b4 Roland Dreier 2007-05-08 3613 225c7b1feef1b4 Roland Dreier 2007-05-08 3614 wqe += sizeof *ctrl; 225c7b1feef1b4 Roland Dreier 2007-05-08 3615 size = sizeof *ctrl / 16; 225c7b1feef1b4 Roland Dreier 2007-05-08 3616 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3617 switch (qp->mlx4_ib_qp_type) { 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3618 case MLX4_IB_QPT_RC: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3619 case MLX4_IB_QPT_UC: 225c7b1feef1b4 Roland Dreier 2007-05-08 3620 switch (wr->opcode) { 225c7b1feef1b4 Roland Dreier 2007-05-08 3621 case IB_WR_ATOMIC_CMP_AND_SWP: 225c7b1feef1b4 Roland Dreier 2007-05-08 3622 case IB_WR_ATOMIC_FETCH_AND_ADD: 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3623 case IB_WR_MASKED_ATOMIC_FETCH_AND_ADD: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3624 set_raddr_seg(wqe, atomic_wr(wr)->remote_addr, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3625 atomic_wr(wr)->rkey); 225c7b1feef1b4 Roland Dreier 2007-05-08 3626 wqe += sizeof (struct mlx4_wqe_raddr_seg); 225c7b1feef1b4 Roland Dreier 2007-05-08 3627 e622f2f4ad2142 Christoph Hellwig 2015-10-08 3628 set_atomic_seg(wqe, atomic_wr(wr)); 225c7b1feef1b4 Roland Dreier 2007-05-08 3629 wqe += sizeof (struct mlx4_wqe_atomic_seg); 0fbfa6a9062c71 Roland Dreier 2007-07-18 3630 225c7b1feef1b4 Roland Dreier 2007-05-08 3631 size += (sizeof (struct mlx4_wqe_raddr_seg) + 225c7b1feef1b4 Roland Dreier 2007-05-08 3632 sizeof (struct mlx4_wqe_atomic_seg)) / 16; 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3633 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3634 break; 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3635 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3636 case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3637 set_raddr_seg(wqe, atomic_wr(wr)->remote_addr, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3638 atomic_wr(wr)->rkey); 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3639 wqe += sizeof (struct mlx4_wqe_raddr_seg); 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3640 e622f2f4ad2142 Christoph Hellwig 2015-10-08 3641 set_masked_atomic_seg(wqe, atomic_wr(wr)); 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3642 wqe += sizeof (struct mlx4_wqe_masked_atomic_seg); 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3643 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3644 size += (sizeof (struct mlx4_wqe_raddr_seg) + 6fa8f719844b84 Vladimir Sokolovsky 2010-04-14 3645 sizeof (struct mlx4_wqe_masked_atomic_seg)) / 16; 225c7b1feef1b4 Roland Dreier 2007-05-08 3646 225c7b1feef1b4 Roland Dreier 2007-05-08 3647 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3648 225c7b1feef1b4 Roland Dreier 2007-05-08 3649 case IB_WR_RDMA_READ: 225c7b1feef1b4 Roland Dreier 2007-05-08 3650 case IB_WR_RDMA_WRITE: 225c7b1feef1b4 Roland Dreier 2007-05-08 3651 case IB_WR_RDMA_WRITE_WITH_IMM: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3652 set_raddr_seg(wqe, rdma_wr(wr)->remote_addr, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3653 rdma_wr(wr)->rkey); 225c7b1feef1b4 Roland Dreier 2007-05-08 3654 wqe += sizeof (struct mlx4_wqe_raddr_seg); 225c7b1feef1b4 Roland Dreier 2007-05-08 3655 size += sizeof (struct mlx4_wqe_raddr_seg) / 16; 225c7b1feef1b4 Roland Dreier 2007-05-08 3656 break; 95d04f0735b4fc Roland Dreier 2008-07-23 3657 95d04f0735b4fc Roland Dreier 2008-07-23 3658 case IB_WR_LOCAL_INV: 2ac6bf4ddc87c3 Jack Morgenstein 2009-06-05 3659 ctrl->srcrb_flags |= 2ac6bf4ddc87c3 Jack Morgenstein 2009-06-05 3660 cpu_to_be32(MLX4_WQE_CTRL_STRONG_ORDER); 95d04f0735b4fc Roland Dreier 2008-07-23 3661 set_local_inv_seg(wqe, wr->ex.invalidate_rkey); 95d04f0735b4fc Roland Dreier 2008-07-23 3662 wqe += sizeof (struct mlx4_wqe_local_inval_seg); 95d04f0735b4fc Roland Dreier 2008-07-23 3663 size += sizeof (struct mlx4_wqe_local_inval_seg) / 16; 95d04f0735b4fc Roland Dreier 2008-07-23 3664 break; 95d04f0735b4fc Roland Dreier 2008-07-23 3665 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3666 case IB_WR_REG_MR: 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3667 ctrl->srcrb_flags |= 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3668 cpu_to_be32(MLX4_WQE_CTRL_STRONG_ORDER); 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3669 set_reg_seg(wqe, reg_wr(wr)); 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3670 wqe += sizeof(struct mlx4_wqe_fmr_seg); 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3671 size += sizeof(struct mlx4_wqe_fmr_seg) / 16; 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3672 break; 1b2cd0fc673c0b Sagi Grimberg 2015-10-13 3673 225c7b1feef1b4 Roland Dreier 2007-05-08 3674 default: 225c7b1feef1b4 Roland Dreier 2007-05-08 3675 /* No extra segments required for sends */ 225c7b1feef1b4 Roland Dreier 2007-05-08 3676 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3677 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3678 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3679 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3680 case MLX4_IB_QPT_TUN_SMI_OWNER: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3681 err = build_sriov_qp0_header(to_msqp(qp), ud_wr(wr), e622f2f4ad2142 Christoph Hellwig 2015-10-08 3682 ctrl, &seglen); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3683 if (unlikely(err)) { 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3684 *bad_wr = wr; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3685 goto out; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3686 } 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3687 wqe += seglen; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3688 size += seglen / 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3689 break; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3690 case MLX4_IB_QPT_TUN_SMI: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3691 case MLX4_IB_QPT_TUN_GSI: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3692 /* this is a UD qp used in MAD responses to slaves. */ e622f2f4ad2142 Christoph Hellwig 2015-10-08 3693 set_datagram_seg(wqe, ud_wr(wr)); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3694 /* set the forced-loopback bit in the data seg av */ 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3695 *(__be32 *) wqe |= cpu_to_be32(0x80000000); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3696 wqe += sizeof (struct mlx4_wqe_datagram_seg); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3697 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3698 break; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3699 case MLX4_IB_QPT_UD: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3700 set_datagram_seg(wqe, ud_wr(wr)); 225c7b1feef1b4 Roland Dreier 2007-05-08 3701 wqe += sizeof (struct mlx4_wqe_datagram_seg); 225c7b1feef1b4 Roland Dreier 2007-05-08 3702 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; b832be1e4007f4 Eli Cohen 2008-04-16 3703 b832be1e4007f4 Eli Cohen 2008-04-16 3704 if (wr->opcode == IB_WR_LSO) { e622f2f4ad2142 Christoph Hellwig 2015-10-08 3705 err = build_lso_seg(wqe, ud_wr(wr), qp, &seglen, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3706 &lso_hdr_sz, &blh); b832be1e4007f4 Eli Cohen 2008-04-16 3707 if (unlikely(err)) { b832be1e4007f4 Eli Cohen 2008-04-16 3708 *bad_wr = wr; b832be1e4007f4 Eli Cohen 2008-04-16 3709 goto out; b832be1e4007f4 Eli Cohen 2008-04-16 3710 } 0fd7e1d8559f45 Roland Dreier 2009-01-16 3711 lso_wqe = (__be32 *) wqe; b832be1e4007f4 Eli Cohen 2008-04-16 3712 wqe += seglen; b832be1e4007f4 Eli Cohen 2008-04-16 3713 size += seglen / 16; b832be1e4007f4 Eli Cohen 2008-04-16 3714 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3715 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3716 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3717 case MLX4_IB_QPT_PROXY_SMI_OWNER: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3718 err = build_sriov_qp0_header(to_msqp(qp), ud_wr(wr), e622f2f4ad2142 Christoph Hellwig 2015-10-08 3719 ctrl, &seglen); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3720 if (unlikely(err)) { 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3721 *bad_wr = wr; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3722 goto out; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3723 } 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3724 wqe += seglen; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3725 size += seglen / 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3726 /* to start tunnel header on a cache-line boundary */ 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3727 add_zero_len_inline(wqe); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3728 wqe += 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3729 size++; e622f2f4ad2142 Christoph Hellwig 2015-10-08 3730 build_tunnel_header(ud_wr(wr), wqe, &seglen); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3731 wqe += seglen; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3732 size += seglen / 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3733 break; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3734 case MLX4_IB_QPT_PROXY_SMI: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3735 case MLX4_IB_QPT_PROXY_GSI: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3736 /* If we are tunneling special qps, this is a UD qp. 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3737 * In this case we first add a UD segment targeting 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3738 * the tunnel qp, and then add a header with address 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3739 * information */ e622f2f4ad2142 Christoph Hellwig 2015-10-08 3740 set_tunnel_datagram_seg(to_mdev(ibqp->device), wqe, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3741 ud_wr(wr), 97982f5a91e91d Jack Morgenstein 2014-05-29 3742 qp->mlx4_ib_qp_type); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3743 wqe += sizeof (struct mlx4_wqe_datagram_seg); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3744 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; e622f2f4ad2142 Christoph Hellwig 2015-10-08 3745 build_tunnel_header(ud_wr(wr), wqe, &seglen); 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3746 wqe += seglen; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3747 size += seglen / 16; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3748 break; 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3749 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3750 case MLX4_IB_QPT_SMI: 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3751 case MLX4_IB_QPT_GSI: e622f2f4ad2142 Christoph Hellwig 2015-10-08 3752 err = build_mlx_header(to_msqp(qp), ud_wr(wr), ctrl, e622f2f4ad2142 Christoph Hellwig 2015-10-08 3753 &seglen); f438000f7a31fa Roland Dreier 2008-04-16 3754 if (unlikely(err)) { 225c7b1feef1b4 Roland Dreier 2007-05-08 3755 *bad_wr = wr; 225c7b1feef1b4 Roland Dreier 2007-05-08 3756 goto out; 225c7b1feef1b4 Roland Dreier 2007-05-08 3757 } f438000f7a31fa Roland Dreier 2008-04-16 3758 wqe += seglen; f438000f7a31fa Roland Dreier 2008-04-16 3759 size += seglen / 16; 225c7b1feef1b4 Roland Dreier 2007-05-08 3760 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3761 225c7b1feef1b4 Roland Dreier 2007-05-08 3762 default: 225c7b1feef1b4 Roland Dreier 2007-05-08 3763 break; 225c7b1feef1b4 Roland Dreier 2007-05-08 3764 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3765 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3766 /* 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3767 * Write data segments in reverse order, so as to 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3768 * overwrite cacheline stamp last within each 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3769 * cacheline. This avoids issues with WQE 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3770 * prefetching. 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3771 */ 225c7b1feef1b4 Roland Dreier 2007-05-08 3772 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3773 dseg = wqe; 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3774 dseg += wr->num_sge - 1; 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3775 size += wr->num_sge * (sizeof (struct mlx4_wqe_data_seg) / 16); 225c7b1feef1b4 Roland Dreier 2007-05-08 3776 225c7b1feef1b4 Roland Dreier 2007-05-08 3777 /* Add one more inline data segment for ICRC for MLX sends */ 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3778 if (unlikely(qp->mlx4_ib_qp_type == MLX4_IB_QPT_SMI || 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3779 qp->mlx4_ib_qp_type == MLX4_IB_QPT_GSI || 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3780 qp->mlx4_ib_qp_type & 1ffeb2eb8be993 Jack Morgenstein 2012-08-03 3781 (MLX4_IB_QPT_PROXY_SMI_OWNER | MLX4_IB_QPT_TUN_SMI_OWNER))) { 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3782 set_mlx_icrc_seg(dseg + 1); 225c7b1feef1b4 Roland Dreier 2007-05-08 3783 size += sizeof (struct mlx4_wqe_data_seg) / 16; 225c7b1feef1b4 Roland Dreier 2007-05-08 3784 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3785 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3786 for (i = wr->num_sge - 1; i >= 0; --i, --dseg) 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3787 set_data_seg(dseg, wr->sg_list + i); 6e694ea33e7a7f Jack Morgenstein 2007-09-19 3788 0fd7e1d8559f45 Roland Dreier 2009-01-16 3789 /* 0fd7e1d8559f45 Roland Dreier 2009-01-16 3790 * Possibly overwrite stamping in cacheline with LSO 0fd7e1d8559f45 Roland Dreier 2009-01-16 3791 * segment only after making sure all data segments 0fd7e1d8559f45 Roland Dreier 2009-01-16 3792 * are written. 0fd7e1d8559f45 Roland Dreier 2009-01-16 3793 */ 0fd7e1d8559f45 Roland Dreier 2009-01-16 3794 wmb(); 0fd7e1d8559f45 Roland Dreier 2009-01-16 @3795 *lso_wqe = lso_hdr_sz; 0fd7e1d8559f45 Roland Dreier 2009-01-16 3796 224e92e02a769b Brenden Blanco 2016-07-19 3797 ctrl->qpn_vlan.fence_size = (wr->send_flags & IB_SEND_FENCE ? 225c7b1feef1b4 Roland Dreier 2007-05-08 3798 MLX4_WQE_CTRL_FENCE : 0) | size; 225c7b1feef1b4 Roland Dreier 2007-05-08 3799 225c7b1feef1b4 Roland Dreier 2007-05-08 3800 /* 225c7b1feef1b4 Roland Dreier 2007-05-08 3801 * Make sure descriptor is fully written before 225c7b1feef1b4 Roland Dreier 2007-05-08 3802 * setting ownership bit (because HW can start 225c7b1feef1b4 Roland Dreier 2007-05-08 3803 * executing as soon as we do). 225c7b1feef1b4 Roland Dreier 2007-05-08 3804 */ 225c7b1feef1b4 Roland Dreier 2007-05-08 3805 wmb(); 225c7b1feef1b4 Roland Dreier 2007-05-08 3806 59b0ed121297b5 Roland Dreier 2007-05-19 3807 if (wr->opcode < 0 || wr->opcode >= ARRAY_SIZE(mlx4_ib_opcode)) { 4ba6b8eaa9d67d Eli Cohen 2012-02-09 3808 *bad_wr = wr; 225c7b1feef1b4 Roland Dreier 2007-05-08 3809 err = -EINVAL; 225c7b1feef1b4 Roland Dreier 2007-05-08 3810 goto out; 225c7b1feef1b4 Roland Dreier 2007-05-08 3811 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3812 225c7b1feef1b4 Roland Dreier 2007-05-08 3813 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] | 417608c20a4c83 Eli Cohen 2009-11-12 3814 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0) | blh; 0e6e74162164d9 Roland Dreier 2007-06-18 3815 0e6e74162164d9 Roland Dreier 2007-06-18 3816 /* 0e6e74162164d9 Roland Dreier 2007-06-18 3817 * We can improve latency by not stamping the last 0e6e74162164d9 Roland Dreier 2007-06-18 3818 * send queue WQE until after ringing the doorbell, so 0e6e74162164d9 Roland Dreier 2007-06-18 3819 * only stamp here if there are still more WQEs to post. 0e6e74162164d9 Roland Dreier 2007-06-18 3820 */ f95ccffc715bf0 Jack Morgenstein 2018-07-26 3821 if (wr->next) f95ccffc715bf0 Jack Morgenstein 2018-07-26 3822 stamp_send_wqe(qp, ind + qp->sq_spare_wqes); f95ccffc715bf0 Jack Morgenstein 2018-07-26 3823 ind++; 225c7b1feef1b4 Roland Dreier 2007-05-08 3824 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3825 225c7b1feef1b4 Roland Dreier 2007-05-08 3826 out: 225c7b1feef1b4 Roland Dreier 2007-05-08 3827 if (likely(nreq)) { 225c7b1feef1b4 Roland Dreier 2007-05-08 3828 qp->sq.head += nreq; 225c7b1feef1b4 Roland Dreier 2007-05-08 3829 225c7b1feef1b4 Roland Dreier 2007-05-08 3830 /* 225c7b1feef1b4 Roland Dreier 2007-05-08 3831 * Make sure that descriptors are written before 225c7b1feef1b4 Roland Dreier 2007-05-08 3832 * doorbell record. 225c7b1feef1b4 Roland Dreier 2007-05-08 3833 */ 225c7b1feef1b4 Roland Dreier 2007-05-08 3834 wmb(); 225c7b1feef1b4 Roland Dreier 2007-05-08 3835 97d82a48d7a7ec Sinan Kaya 2018-03-19 3836 writel_relaxed(qp->doorbell_qpn, 225c7b1feef1b4 Roland Dreier 2007-05-08 3837 to_mdev(ibqp->device)->uar_map + MLX4_SEND_DOORBELL); 225c7b1feef1b4 Roland Dreier 2007-05-08 3838 f95ccffc715bf0 Jack Morgenstein 2018-07-26 3839 stamp_send_wqe(qp, ind + qp->sq_spare_wqes - 1); ea54b10c777300 Jack Morgenstein 2008-01-28 3840 ea54b10c777300 Jack Morgenstein 2008-01-28 3841 qp->sq_next_wqe = ind; 225c7b1feef1b4 Roland Dreier 2007-05-08 3842 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3843 96db0e0335c798 Roland Dreier 2007-10-30 3844 spin_unlock_irqrestore(&qp->sq.lock, flags); 225c7b1feef1b4 Roland Dreier 2007-05-08 3845 225c7b1feef1b4 Roland Dreier 2007-05-08 3846 return err; 225c7b1feef1b4 Roland Dreier 2007-05-08 3847 } 225c7b1feef1b4 Roland Dreier 2007-05-08 3848 :::::: The code at line 3795 was first introduced by commit :::::: 0fd7e1d8559f45a6838cee93ea49adc0c5bda8f0 IB/mlx4: Fix memory ordering problem when posting LSO sends :::::: TO: Roland Dreier <[email protected]> :::::: CC: Roland Dreier <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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