CC: [email protected] CC: [email protected] TO: Kim Phillips <[email protected]> CC: Peter Zijlstra <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git perf/core head: 0b8f94ea282357a79781d10024708c2cf0ff5305 commit: 0b8f94ea282357a79781d10024708c2cf0ff5305 [8/8] perf/x86/amd/ibs: Add bitfield definitions in new header :::::: branch date: 4 hours ago :::::: commit date: 4 hours ago config: i386-randconfig-s032-20210816 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.3-348-gf0e6938b-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git/commit/?id=0b8f94ea282357a79781d10024708c2cf0ff5305 git remote add peterz-queue https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git git fetch --no-tags peterz-queue perf/core git checkout 0b8f94ea282357a79781d10024708c2cf0ff5305 # save the attached .config to linux build tree make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash arch/x86/events/amd/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> sparse warnings: (new ones prefixed by >>) >> arch/x86/events/amd/ibs.c:344:31: sparse: sparse: invalid access past the >> end of 'op_ctl' (4 8) vim +/op_ctl +344 arch/x86/events/amd/ibs.c db98c5faf8cb35 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2011-12-15 328 db98c5faf8cb35 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2011-12-15 329 static u64 get_ibs_op_count(u64 config) db98c5faf8cb35 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2011-12-15 330 { 0b8f94ea282357 arch/x86/events/amd/ibs.c Kim Phillips 2021-08-17 331 union ibs_op_ctl op_ctl = (union ibs_op_ctl)config; 8b1e13638d4658 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2012-04-02 332 u64 count = 0; 8b1e13638d4658 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2012-04-02 333 680d69635005ba arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 334 /* 680d69635005ba arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 335 * If the internal 27-bit counter rolled over, the count is MaxCnt 680d69635005ba arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 336 * and the lower 7 bits of CurCnt are randomized. 680d69635005ba arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 337 * Otherwise CurCnt has the full 27-bit current counter value. 680d69635005ba arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 338 */ 0b8f94ea282357 arch/x86/events/amd/ibs.c Kim Phillips 2021-08-17 339 if (op_ctl.op_val) { 0b8f94ea282357 arch/x86/events/amd/ibs.c Kim Phillips 2021-08-17 340 count = op_ctl.opmaxcnt << 4; 8b0bed7d410f48 arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 341 if (ibs_caps & IBS_CAPS_OPCNTEXT) 0b8f94ea282357 arch/x86/events/amd/ibs.c Kim Phillips 2021-08-17 342 count += op_ctl.opmaxcnt_ext << 20; 8b0bed7d410f48 arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 343 } else if (ibs_caps & IBS_CAPS_RDWROPCNT) { 0b8f94ea282357 arch/x86/events/amd/ibs.c Kim Phillips 2021-08-17 @344 count = op_ctl.opcurcnt; 8b0bed7d410f48 arch/x86/events/amd/ibs.c Kim Phillips 2020-09-08 345 } 8b1e13638d4658 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2012-04-02 346 8b1e13638d4658 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2012-04-02 347 return count; db98c5faf8cb35 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2011-12-15 348 } db98c5faf8cb35 arch/x86/kernel/cpu/perf_event_amd_ibs.c Robert Richter 2011-12-15 349 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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