CC: [email protected] CC: [email protected] TO: Luc Van Oostenryck <[email protected]> CC: Andrew Morton <[email protected]> CC: Linux Memory Management List <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: d6d09a6942050f21b065a134169002b4d6b701ef commit: d991bb1c8da842a2a0b9dc83b1005e655783f861 include/linux/compiler-gcc.h: sparse can do constant folding of __builtin_bswap*() date: 4 months ago :::::: branch date: 16 hours ago :::::: commit date: 4 months ago config: arm-randconfig-m031-20210818 (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/irqchip/irq-hip04.c:404 hip04_of_init() warn: 'hip04_data.cpu_base' not released on lines: 386,394. drivers/irqchip/irq-hip04.c:404 hip04_of_init() warn: 'hip04_data.dist_base' not released on lines: 386,394. vim +404 drivers/irqchip/irq-hip04.c 8e4bebe0952af3 Haojian Zhuang 2014-08-07 351 8e4bebe0952af3 Haojian Zhuang 2014-08-07 352 static int __init 8e4bebe0952af3 Haojian Zhuang 2014-08-07 353 hip04_of_init(struct device_node *node, struct device_node *parent) 8e4bebe0952af3 Haojian Zhuang 2014-08-07 354 { 8e4bebe0952af3 Haojian Zhuang 2014-08-07 355 int nr_irqs, irq_base, i; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 356 8e4bebe0952af3 Haojian Zhuang 2014-08-07 357 if (WARN_ON(!node)) 8e4bebe0952af3 Haojian Zhuang 2014-08-07 358 return -ENODEV; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 359 8e4bebe0952af3 Haojian Zhuang 2014-08-07 360 hip04_data.dist_base = of_iomap(node, 0); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 361 WARN(!hip04_data.dist_base, "fail to map hip04 intc dist registers\n"); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 362 8e4bebe0952af3 Haojian Zhuang 2014-08-07 363 hip04_data.cpu_base = of_iomap(node, 1); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 364 WARN(!hip04_data.cpu_base, "unable to map hip04 intc cpu registers\n"); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 365 8e4bebe0952af3 Haojian Zhuang 2014-08-07 366 /* 8e4bebe0952af3 Haojian Zhuang 2014-08-07 367 * Initialize the CPU interface map to all CPUs. 8e4bebe0952af3 Haojian Zhuang 2014-08-07 368 * It will be refined as each CPU probes its ID. 8e4bebe0952af3 Haojian Zhuang 2014-08-07 369 */ 8e4bebe0952af3 Haojian Zhuang 2014-08-07 370 for (i = 0; i < NR_HIP04_CPU_IF; i++) 03d3d45be41319 Wang Long 2014-12-11 371 hip04_cpu_map[i] = 0xffff; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 372 8e4bebe0952af3 Haojian Zhuang 2014-08-07 373 /* 8e4bebe0952af3 Haojian Zhuang 2014-08-07 374 * Find out how many interrupts are supported. 8e4bebe0952af3 Haojian Zhuang 2014-08-07 375 * The HIP04 INTC only supports up to 510 interrupt sources. 8e4bebe0952af3 Haojian Zhuang 2014-08-07 376 */ 8e4bebe0952af3 Haojian Zhuang 2014-08-07 377 nr_irqs = readl_relaxed(hip04_data.dist_base + GIC_DIST_CTR) & 0x1f; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 378 nr_irqs = (nr_irqs + 1) * 32; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 379 if (nr_irqs > HIP04_MAX_IRQS) 8e4bebe0952af3 Haojian Zhuang 2014-08-07 380 nr_irqs = HIP04_MAX_IRQS; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 381 hip04_data.nr_irqs = nr_irqs; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 382 a2df12c5899e9b Marc Zyngier 2020-06-20 383 irq_base = irq_alloc_descs(-1, 0, nr_irqs, numa_node_id()); 287980e49ffc0f Arnd Bergmann 2016-05-27 384 if (irq_base < 0) { 8e4bebe0952af3 Haojian Zhuang 2014-08-07 385 pr_err("failed to allocate IRQ numbers\n"); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 386 return -EINVAL; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 387 } 8e4bebe0952af3 Haojian Zhuang 2014-08-07 388 8e4bebe0952af3 Haojian Zhuang 2014-08-07 389 hip04_data.domain = irq_domain_add_legacy(node, nr_irqs, irq_base, a2df12c5899e9b Marc Zyngier 2020-06-20 390 0, 8e4bebe0952af3 Haojian Zhuang 2014-08-07 391 &hip04_irq_domain_ops, 8e4bebe0952af3 Haojian Zhuang 2014-08-07 392 &hip04_data); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 393 if (WARN_ON(!hip04_data.domain)) 8e4bebe0952af3 Haojian Zhuang 2014-08-07 394 return -EINVAL; 8e4bebe0952af3 Haojian Zhuang 2014-08-07 395 8e4bebe0952af3 Haojian Zhuang 2014-08-07 396 #ifdef CONFIG_SMP a2df12c5899e9b Marc Zyngier 2020-06-20 397 set_smp_ipi_range(irq_base, 16); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 398 #endif 8e4bebe0952af3 Haojian Zhuang 2014-08-07 399 set_handle_irq(hip04_handle_irq); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 400 8e4bebe0952af3 Haojian Zhuang 2014-08-07 401 hip04_irq_dist_init(&hip04_data); 73c1b41e63f040 Thomas Gleixner 2016-12-21 402 cpuhp_setup_state(CPUHP_AP_IRQ_HIP04_STARTING, "irqchip/hip04:starting", 6c034d1736384c Richard Cochran 2016-07-13 403 hip04_irq_starting_cpu, NULL); 8e4bebe0952af3 Haojian Zhuang 2014-08-07 @404 return 0; :::::: The code at line 404 was first introduced by commit :::::: 8e4bebe0952af357e099147023af756baa466ede irqchip: hip04: Enable Hisilicon HiP04 interrupt controller :::::: TO: Haojian Zhuang <[email protected]> :::::: CC: Jason Cooper <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
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