CC: [email protected] In-Reply-To: <[email protected]> References: <[email protected]> TO: Ben Widawsky <[email protected]> TO: [email protected] TO: [email protected] CC: Ben Widawsky <[email protected]> CC: Alison Schofield <[email protected]> CC: Dan Williams <[email protected]> CC: Ira Weiny <[email protected]> CC: Jonathan Cameron <[email protected]> CC: Vishal Verma <[email protected]>
Hi Ben, I love your patch! Perhaps something to improve: [auto build test WARNING on 53989fad1286e652ea3655ae3367ba698da8d2ff] url: https://github.com/0day-ci/linux/commits/Ben-Widawsky/Add-drivers-for-CXL-ports-and-mem-devices/20211120-080513 base: 53989fad1286e652ea3655ae3367ba698da8d2ff :::::: branch date: 6 days ago :::::: commit date: 6 days ago config: x86_64-randconfig-m001-20211118 (https://download.01.org/0day-ci/archive/20211126/[email protected]/config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/cxl/mem.c:164 cxl_mem_probe() warn: ignoring unreachable code. vim +164 drivers/cxl/mem.c c1dc1914d16616 Ben Widawsky 2021-11-19 117 c1dc1914d16616 Ben Widawsky 2021-11-19 118 static int cxl_mem_probe(struct device *dev) c1dc1914d16616 Ben Widawsky 2021-11-19 119 { c1dc1914d16616 Ben Widawsky 2021-11-19 120 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); c1dc1914d16616 Ben Widawsky 2021-11-19 121 struct cxl_port *hostbridge, *parent_port; c1dc1914d16616 Ben Widawsky 2021-11-19 122 struct walk_ctx ctx = { NULL, false }; c1dc1914d16616 Ben Widawsky 2021-11-19 123 struct cxl_dport *dport; c1dc1914d16616 Ben Widawsky 2021-11-19 124 int rc; c1dc1914d16616 Ben Widawsky 2021-11-19 125 c1dc1914d16616 Ben Widawsky 2021-11-19 126 rc = wait_for_media(cxlmd); c1dc1914d16616 Ben Widawsky 2021-11-19 127 if (rc) { c1dc1914d16616 Ben Widawsky 2021-11-19 128 dev_err(dev, "Media not active (%d)\n", rc); c1dc1914d16616 Ben Widawsky 2021-11-19 129 return rc; c1dc1914d16616 Ben Widawsky 2021-11-19 130 } c1dc1914d16616 Ben Widawsky 2021-11-19 131 c1dc1914d16616 Ben Widawsky 2021-11-19 132 walk_to_root_port(dev, &ctx); c1dc1914d16616 Ben Widawsky 2021-11-19 133 c1dc1914d16616 Ben Widawsky 2021-11-19 134 /* c1dc1914d16616 Ben Widawsky 2021-11-19 135 * Couldn't find a CXL capable root port. This may happen even with a c1dc1914d16616 Ben Widawsky 2021-11-19 136 * CXL capable topology if cxl_acpi hasn't completed yet. A rescan will c1dc1914d16616 Ben Widawsky 2021-11-19 137 * occur. c1dc1914d16616 Ben Widawsky 2021-11-19 138 */ c1dc1914d16616 Ben Widawsky 2021-11-19 139 if (!ctx.root_port) c1dc1914d16616 Ben Widawsky 2021-11-19 140 return -ENODEV; c1dc1914d16616 Ben Widawsky 2021-11-19 141 c1dc1914d16616 Ben Widawsky 2021-11-19 142 hostbridge = ctx.root_port->port; c1dc1914d16616 Ben Widawsky 2021-11-19 143 device_lock(&hostbridge->dev); c1dc1914d16616 Ben Widawsky 2021-11-19 144 c1dc1914d16616 Ben Widawsky 2021-11-19 145 /* hostbridge has no port driver, the topology isn't enabled yet */ c1dc1914d16616 Ben Widawsky 2021-11-19 146 if (!hostbridge->dev.driver) { c1dc1914d16616 Ben Widawsky 2021-11-19 147 device_unlock(&hostbridge->dev); c1dc1914d16616 Ben Widawsky 2021-11-19 148 return -ENODEV; c1dc1914d16616 Ben Widawsky 2021-11-19 149 } c1dc1914d16616 Ben Widawsky 2021-11-19 150 c1dc1914d16616 Ben Widawsky 2021-11-19 151 /* No switch + found root port means we're done */ c1dc1914d16616 Ben Widawsky 2021-11-19 152 if (!ctx.has_switch) { c1dc1914d16616 Ben Widawsky 2021-11-19 153 parent_port = to_cxl_port(&hostbridge->dev); c1dc1914d16616 Ben Widawsky 2021-11-19 154 dport = ctx.root_port; c1dc1914d16616 Ben Widawsky 2021-11-19 155 goto out; c1dc1914d16616 Ben Widawsky 2021-11-19 156 } c1dc1914d16616 Ben Widawsky 2021-11-19 157 3a5b49dc14175d Ben Widawsky 2021-11-19 158 /* FIXME: Add true switch support */ 3a5b49dc14175d Ben Widawsky 2021-11-19 159 dev_err(dev, "Devices behind switches are currently unsupported\n"); 3a5b49dc14175d Ben Widawsky 2021-11-19 160 rc = -ENODEV; 3a5b49dc14175d Ben Widawsky 2021-11-19 161 goto err_out; 3a5b49dc14175d Ben Widawsky 2021-11-19 162 c1dc1914d16616 Ben Widawsky 2021-11-19 163 /* Walk down from the root port and add all switches */ c1dc1914d16616 Ben Widawsky 2021-11-19 @164 cxl_scan_ports(ctx.root_port); c1dc1914d16616 Ben Widawsky 2021-11-19 165 c1dc1914d16616 Ben Widawsky 2021-11-19 166 /* If parent is a dport the endpoint is good to go. */ c1dc1914d16616 Ben Widawsky 2021-11-19 167 parent_port = to_cxl_port(dev->parent->parent); c1dc1914d16616 Ben Widawsky 2021-11-19 168 dport = cxl_find_dport_by_dev(parent_port, dev->parent); c1dc1914d16616 Ben Widawsky 2021-11-19 169 if (!dport) { c1dc1914d16616 Ben Widawsky 2021-11-19 170 rc = -ENODEV; c1dc1914d16616 Ben Widawsky 2021-11-19 171 goto err_out; c1dc1914d16616 Ben Widawsky 2021-11-19 172 } c1dc1914d16616 Ben Widawsky 2021-11-19 173 c1dc1914d16616 Ben Widawsky 2021-11-19 174 out: c1dc1914d16616 Ben Widawsky 2021-11-19 175 rc = create_endpoint(dev, parent_port, dport); c1dc1914d16616 Ben Widawsky 2021-11-19 176 if (rc) c1dc1914d16616 Ben Widawsky 2021-11-19 177 goto err_out; c1dc1914d16616 Ben Widawsky 2021-11-19 178 c1dc1914d16616 Ben Widawsky 2021-11-19 179 cxlmd->root_port = ctx.root_port; c1dc1914d16616 Ben Widawsky 2021-11-19 180 c1dc1914d16616 Ben Widawsky 2021-11-19 181 err_out: c1dc1914d16616 Ben Widawsky 2021-11-19 182 device_unlock(&hostbridge->dev); c1dc1914d16616 Ben Widawsky 2021-11-19 183 return rc; c1dc1914d16616 Ben Widawsky 2021-11-19 184 } c1dc1914d16616 Ben Widawsky 2021-11-19 185 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected] _______________________________________________ kbuild mailing list -- [email protected] To unsubscribe send an email to [email protected]
