CC: [email protected] CC: [email protected] TO: Luc Van Oostenryck <[email protected]> CC: Andrew Morton <[email protected]> CC: Linux Memory Management List <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: f71077a4d84bbe8c7b91b7db7c4ef815755ac5e3 commit: d991bb1c8da842a2a0b9dc83b1005e655783f861 include/linux/compiler-gcc.h: sparse can do constant folding of __builtin_bswap*() date: 10 months ago :::::: branch date: 18 hours ago :::::: commit date: 10 months ago config: arm-randconfig-m031-20220217 (https://download.01.org/0day-ci/archive/20220217/[email protected]/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/irqchip/irq-nvic.c:131 nvic_of_init() warn: 'nvic_base' not released on lines: 97. vim +/nvic_base +131 drivers/irqchip/irq-nvic.c 2d9f59f7bf8ef5 Stefan Agner 2015-05-16 71 292ec080491d87 Uwe Kleine-König 2013-06-26 72 static int __init nvic_of_init(struct device_node *node, 292ec080491d87 Uwe Kleine-König 2013-06-26 73 struct device_node *parent) 292ec080491d87 Uwe Kleine-König 2013-06-26 74 { 292ec080491d87 Uwe Kleine-König 2013-06-26 75 unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; 292ec080491d87 Uwe Kleine-König 2013-06-26 76 unsigned int irqs, i, ret, numbanks; 292ec080491d87 Uwe Kleine-König 2013-06-26 77 void __iomem *nvic_base; 292ec080491d87 Uwe Kleine-König 2013-06-26 78 292ec080491d87 Uwe Kleine-König 2013-06-26 79 numbanks = (readl_relaxed(V7M_SCS_ICTR) & 292ec080491d87 Uwe Kleine-König 2013-06-26 80 V7M_SCS_ICTR_INTLINESNUM_MASK) + 1; 292ec080491d87 Uwe Kleine-König 2013-06-26 81 292ec080491d87 Uwe Kleine-König 2013-06-26 82 nvic_base = of_iomap(node, 0); 292ec080491d87 Uwe Kleine-König 2013-06-26 83 if (!nvic_base) { 292ec080491d87 Uwe Kleine-König 2013-06-26 84 pr_warn("unable to map nvic registers\n"); 292ec080491d87 Uwe Kleine-König 2013-06-26 85 return -ENOMEM; 292ec080491d87 Uwe Kleine-König 2013-06-26 86 } 292ec080491d87 Uwe Kleine-König 2013-06-26 87 292ec080491d87 Uwe Kleine-König 2013-06-26 88 irqs = numbanks * 32; 292ec080491d87 Uwe Kleine-König 2013-06-26 89 if (irqs > NVIC_MAX_IRQ) 292ec080491d87 Uwe Kleine-König 2013-06-26 90 irqs = NVIC_MAX_IRQ; 292ec080491d87 Uwe Kleine-König 2013-06-26 91 292ec080491d87 Uwe Kleine-König 2013-06-26 92 nvic_irq_domain = 2d9f59f7bf8ef5 Stefan Agner 2015-05-16 93 irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL); 2d9f59f7bf8ef5 Stefan Agner 2015-05-16 94 292ec080491d87 Uwe Kleine-König 2013-06-26 95 if (!nvic_irq_domain) { 292ec080491d87 Uwe Kleine-König 2013-06-26 96 pr_warn("Failed to allocate irq domain\n"); 292ec080491d87 Uwe Kleine-König 2013-06-26 97 return -ENOMEM; 292ec080491d87 Uwe Kleine-König 2013-06-26 98 } 292ec080491d87 Uwe Kleine-König 2013-06-26 99 5b8aae489a07ac Axel Lin 2013-07-05 100 ret = irq_alloc_domain_generic_chips(nvic_irq_domain, 32, 1, 292ec080491d87 Uwe Kleine-König 2013-06-26 101 "nvic_irq", handle_fasteoi_irq, 292ec080491d87 Uwe Kleine-König 2013-06-26 102 clr, 0, IRQ_GC_INIT_MASK_CACHE); 292ec080491d87 Uwe Kleine-König 2013-06-26 103 if (ret) { 292ec080491d87 Uwe Kleine-König 2013-06-26 104 pr_warn("Failed to allocate irq chips\n"); 292ec080491d87 Uwe Kleine-König 2013-06-26 105 irq_domain_remove(nvic_irq_domain); 292ec080491d87 Uwe Kleine-König 2013-06-26 106 return ret; 292ec080491d87 Uwe Kleine-König 2013-06-26 107 } 292ec080491d87 Uwe Kleine-König 2013-06-26 108 292ec080491d87 Uwe Kleine-König 2013-06-26 109 for (i = 0; i < numbanks; ++i) { 292ec080491d87 Uwe Kleine-König 2013-06-26 110 struct irq_chip_generic *gc; 292ec080491d87 Uwe Kleine-König 2013-06-26 111 292ec080491d87 Uwe Kleine-König 2013-06-26 112 gc = irq_get_domain_generic_chip(nvic_irq_domain, 32 * i); 292ec080491d87 Uwe Kleine-König 2013-06-26 113 gc->reg_base = nvic_base + 4 * i; 292ec080491d87 Uwe Kleine-König 2013-06-26 114 gc->chip_types[0].regs.enable = NVIC_ISER; 292ec080491d87 Uwe Kleine-König 2013-06-26 115 gc->chip_types[0].regs.disable = NVIC_ICER; 292ec080491d87 Uwe Kleine-König 2013-06-26 116 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; 292ec080491d87 Uwe Kleine-König 2013-06-26 117 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; 8b53ec260e601d Daniel Thompson 2014-06-04 118 /* This is a no-op as end of interrupt is signaled by the 8b53ec260e601d Daniel Thompson 2014-06-04 119 * exception return sequence. 8b53ec260e601d Daniel Thompson 2014-06-04 120 */ 8b53ec260e601d Daniel Thompson 2014-06-04 121 gc->chip_types[0].chip.irq_eoi = irq_gc_noop; 292ec080491d87 Uwe Kleine-König 2013-06-26 122 292ec080491d87 Uwe Kleine-König 2013-06-26 123 /* disable interrupts */ 292ec080491d87 Uwe Kleine-König 2013-06-26 124 writel_relaxed(~0, gc->reg_base + NVIC_ICER); 292ec080491d87 Uwe Kleine-König 2013-06-26 125 } 292ec080491d87 Uwe Kleine-König 2013-06-26 126 292ec080491d87 Uwe Kleine-König 2013-06-26 127 /* Set priority on all interrupts */ 292ec080491d87 Uwe Kleine-König 2013-06-26 128 for (i = 0; i < irqs; i += 4) 292ec080491d87 Uwe Kleine-König 2013-06-26 129 writel_relaxed(0, nvic_base + NVIC_IPR + i); 292ec080491d87 Uwe Kleine-König 2013-06-26 130 292ec080491d87 Uwe Kleine-König 2013-06-26 @131 return 0; :::::: The code at line 131 was first introduced by commit :::::: 292ec080491d87c888c29c5e161c10eb86e5961e irqchip: Add support for ARMv7-M NVIC :::::: TO: Uwe Kleine-König <[email protected]> :::::: CC: Thomas Gleixner <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected] _______________________________________________ kbuild mailing list -- [email protected] To unsubscribe send an email to [email protected]
