CC: [email protected] BCC: [email protected] TO: Srikanth Thokala <[email protected]> CC: nanli2x <[email protected]>
tree: https://github.com/intel/linux-intel-lts.git 5.15/linux head: 28355ba25d3468058a5470273bc7b9c8b411b958 commit: 28f72667fffb64d777e6f3f3017995d7d4f9e558 [4/5] PCI: thunderbay: Add support for Thunderbay Root Port :::::: branch date: 4 days ago :::::: commit date: 5 weeks ago config: ia64-randconfig-m031-20220325 (https://download.01.org/0day-ci/archive/20220326/[email protected]/config) compiler: ia64-linux-gcc (GCC) 11.2.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/pci/controller/dwc/pcie-keembay.c:255 thunderbay_pcie_host_rd_other_conf() error: uninitialized symbol 'ret'. vim +/ret +255 drivers/pci/controller/dwc/pcie-keembay.c 28f72667fffb64d Srikanth Thokala 2021-09-16 219 28f72667fffb64d Srikanth Thokala 2021-09-16 220 static int 28f72667fffb64d Srikanth Thokala 2021-09-16 221 thunderbay_pcie_host_rd_other_conf(struct pci_bus *bus, unsigned int devfn, 28f72667fffb64d Srikanth Thokala 2021-09-16 222 int where, int size, u32 *val) 28f72667fffb64d Srikanth Thokala 2021-09-16 223 { 28f72667fffb64d Srikanth Thokala 2021-09-16 224 struct pcie_port *pp = bus->sysdata; 28f72667fffb64d Srikanth Thokala 2021-09-16 225 struct keembay_pcie *pcie; 28f72667fffb64d Srikanth Thokala 2021-09-16 226 int ret, where_align; 28f72667fffb64d Srikanth Thokala 2021-09-16 227 struct dw_pcie *pci; 28f72667fffb64d Srikanth Thokala 2021-09-16 228 28f72667fffb64d Srikanth Thokala 2021-09-16 229 pci = to_dw_pcie_from_pp(pp); 28f72667fffb64d Srikanth Thokala 2021-09-16 230 pcie = dev_get_drvdata(pci->dev); 28f72667fffb64d Srikanth Thokala 2021-09-16 231 28f72667fffb64d Srikanth Thokala 2021-09-16 232 if (pcie->rc_dma) { 28f72667fffb64d Srikanth Thokala 2021-09-16 233 where_align = where & ~((typeof(where))(4) - 1); 28f72667fffb64d Srikanth Thokala 2021-09-16 234 if (thunderbay_pcie_rc_dma_rd(pp, 28f72667fffb64d Srikanth Thokala 2021-09-16 235 pcie->rd_dma_chan, 28f72667fffb64d Srikanth Thokala 2021-09-16 236 pcie->rc_dma_mem_pa + where_align, 28f72667fffb64d Srikanth Thokala 2021-09-16 237 pp->cfg0_base + where_align, 28f72667fffb64d Srikanth Thokala 2021-09-16 238 4)) 28f72667fffb64d Srikanth Thokala 2021-09-16 239 ret = PCIBIOS_BAD_REGISTER_NUMBER; 28f72667fffb64d Srikanth Thokala 2021-09-16 240 28f72667fffb64d Srikanth Thokala 2021-09-16 241 *val = *((int *)(pcie->rc_dma_mem_va + where)); 28f72667fffb64d Srikanth Thokala 2021-09-16 242 28f72667fffb64d Srikanth Thokala 2021-09-16 243 if (size == 4) 28f72667fffb64d Srikanth Thokala 2021-09-16 244 *val &= 0xFFFFFFFF; 28f72667fffb64d Srikanth Thokala 2021-09-16 245 else if (size == 2) 28f72667fffb64d Srikanth Thokala 2021-09-16 246 *val &= 0xFFFF; 28f72667fffb64d Srikanth Thokala 2021-09-16 247 else if (size == 1) 28f72667fffb64d Srikanth Thokala 2021-09-16 248 *val &= 0xFF; 28f72667fffb64d Srikanth Thokala 2021-09-16 249 else 28f72667fffb64d Srikanth Thokala 2021-09-16 250 ret = PCIBIOS_BAD_REGISTER_NUMBER; 28f72667fffb64d Srikanth Thokala 2021-09-16 251 } else { 28f72667fffb64d Srikanth Thokala 2021-09-16 252 ret = dw_pcie_read(pp->va_cfg0_base + where, size, val); 28f72667fffb64d Srikanth Thokala 2021-09-16 253 } 28f72667fffb64d Srikanth Thokala 2021-09-16 254 28f72667fffb64d Srikanth Thokala 2021-09-16 @255 return ret; 28f72667fffb64d Srikanth Thokala 2021-09-16 256 } 28f72667fffb64d Srikanth Thokala 2021-09-16 257 -- 0-DAY CI Kernel Test Service https://01.org/lkp _______________________________________________ kbuild mailing list -- [email protected] To unsubscribe send an email to [email protected]
