CC: [email protected] BCC: [email protected] CC: [email protected] TO: Paul Boddie <[email protected]> CC: Paul Cercueil <[email protected]> CC: Ezequiel Garcia <[email protected]> CC: "H. Nikolaus Schaller" <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: b2d229d4ddb17db541098b83524d901257e93845 commit: b807fd2c43fe008eb6f4083e196ea38dadad9680 drm/ingenic: Add support for JZ4780 and HDMI output date: 4 months ago :::::: branch date: 33 hours ago :::::: commit date: 4 months ago compiler: riscv32-linux-gcc (GCC) 11.2.0 reproduce (cppcheck warning): # apt-get install cppcheck git checkout b807fd2c43fe008eb6f4083e196ea38dadad9680 cppcheck --quiet --enable=style,performance,portability --template=gcc FILE If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> cppcheck possible warnings: (new ones prefixed by >>, may not real problems) drivers/gpu/drm/ingenic/ingenic-drm-drv.c:523:70: warning: Parameter 'plane' can be declared with const [constParameter] void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane) ^ drivers/gpu/drm/ingenic/ingenic-drm-drv.c:509:28: warning: Parameter 'plane' can be declared with const [constParameter] struct drm_plane *plane) ^ drivers/gpu/drm/ingenic/ingenic-drm-drv.c:1368:49: warning: Parameter 'data' can be declared with const [constParameter] static int compare_of(struct device *dev, void *data) ^ >> drivers/gpu/drm/ingenic/ingenic-drm-drv.c:697:11: warning: Signed integer >> overflow for expression '0xff<<24'. [integerOverflow] (0xff << JZ_LCD_DESSIZE_ALPHA_OFFSET) | ^ vim +697 drivers/gpu/drm/ingenic/ingenic-drm-drv.c 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 641 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 642 static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, 977697e20b3d758 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 643 struct drm_atomic_state *state) 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 644 { 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 645 struct ingenic_drm *priv = drm_device_get_priv(plane->dev); 4a791cb6d34f42e drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-05-23 646 struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane); 4a791cb6d34f42e drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-05-23 647 struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane); 1bdb542da736e29 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 648 unsigned int width, height, cpp, next_id, plane_id; 6055466203df46a drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 649 struct ingenic_drm_private_state *priv_state; 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 650 struct drm_crtc_state *crtc_state; 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 651 struct ingenic_dma_hwdesc *hwdesc; 354b051c5dcbeb3 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-12-10 652 dma_addr_t addr; 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 653 u32 fourcc; 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 654 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 655 if (newstate && newstate->fb) { 4a791cb6d34f42e drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-05-23 656 if (priv->soc_info->map_noncoherent) 4a791cb6d34f42e drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-05-23 657 drm_fb_cma_sync_non_coherent(&priv->drm, oldstate, newstate); 4a791cb6d34f42e drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-05-23 658 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 659 crtc_state = newstate->crtc->state; 1bdb542da736e29 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 660 plane_id = !!(priv->soc_info->has_osd && plane != &priv->f0); 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 661 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 662 addr = drm_fb_cma_get_gem_addr(newstate->fb, newstate, 0); 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 663 width = newstate->src_w >> 16; 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 664 height = newstate->src_h >> 16; 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 665 cpp = newstate->fb->format->cpp[0]; 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 666 6055466203df46a drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 667 priv_state = ingenic_drm_get_new_priv_state(priv, state); 6055466203df46a drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 668 next_id = (priv_state && priv_state->use_palette) ? HWDESC_PALETTE : plane_id; 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 669 6055466203df46a drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 670 hwdesc = &priv->dma_hwdescs->hwdesc[plane_id]; 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 671 hwdesc->addr = addr; 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 672 hwdesc->cmd = JZ_LCD_CMD_EOF_IRQ | (width * height * cpp / 4); 6055466203df46a drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2021-10-26 673 hwdesc->next = dma_hwdesc_addr(priv, next_id); 3c9bea4ef32bdcd drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-07-16 674 b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 675 if (priv->soc_info->use_extended_hwdesc) { b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 676 hwdesc->cmd |= JZ_LCD_CMD_FRM_ENABLE; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 677 b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 678 /* Extended 8-byte descriptor */ b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 679 hwdesc->cpos = 0; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 680 hwdesc->offsize = 0; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 681 hwdesc->pagewidth = 0; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 682 b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 683 switch (newstate->fb->format->format) { b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 684 case DRM_FORMAT_XRGB1555: b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 685 hwdesc->cpos |= JZ_LCD_CPOS_RGB555; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 686 fallthrough; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 687 case DRM_FORMAT_RGB565: b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 688 hwdesc->cpos |= JZ_LCD_CPOS_BPP_15_16; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 689 break; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 690 case DRM_FORMAT_XRGB8888: b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 691 hwdesc->cpos |= JZ_LCD_CPOS_BPP_18_24; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 692 break; b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 693 } b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 694 hwdesc->cpos |= (JZ_LCD_CPOS_COEFFICIENT_1 << b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 695 JZ_LCD_CPOS_COEFFICIENT_OFFSET); b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 696 hwdesc->dessize = b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 @697 (0xff << JZ_LCD_DESSIZE_ALPHA_OFFSET) | b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 698 FIELD_PREP(JZ_LCD_DESSIZE_HEIGHT_MASK, height - 1) | b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 699 FIELD_PREP(JZ_LCD_DESSIZE_WIDTH_MASK, width - 1); b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 700 } b807fd2c43fe008 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Boddie 2021-12-02 701 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 702 if (drm_atomic_crtc_needs_modeset(crtc_state)) { 41016fe1028e4b0 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Maxime Ripard 2021-02-19 703 fourcc = newstate->fb->format->format; 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 704 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 705 ingenic_drm_plane_config(priv->dev, plane, fourcc); 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 706 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 707 crtc_state->color_mgmt_changed = fourcc == DRM_FORMAT_C8; 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 708 } 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 709 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 710 if (crtc_state->color_mgmt_changed) 686d4b4b99afe79 drivers/gpu/drm/ingenic/ingenic-drm-drv.c Paul Cercueil 2020-09-27 711 ingenic_drm_update_palette(priv, crtc_state->gamma_lut->data); 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 712 } 354b051c5dcbeb3 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-12-10 713 } 90b86fcc47b4d18 drivers/gpu/drm/ingenic/ingenic-drm.c Paul Cercueil 2019-06-03 714 -- 0-DAY CI Kernel Test Service https://01.org/lkp _______________________________________________ kbuild mailing list -- [email protected] To unsubscribe send an email to [email protected]
