https://bugs.kde.org/show_bug.cgi?id=271615
--- Comment #16 from Mark Wielaard <[email protected]> --- (In reply to mcermak from comment #14) > Created attachment 192414 [details] > updated patch > > Good morning Mark, I've updated the commit message, reordered NEWS, removed > the TODO for instruction support detection since, as you say, its generic, > sw emulated. Updated the if statement. Thanks. > > We'll just update the cpuid to 8 indicate we do support POPCNT. > I've added that to the VEX/priv/guest_x86_helpers.c ---> > x86g_dirtyhelper_CPUID_sse3() > > This is based on Intel manual > https://cdrdv2.intel.com/v1/dl/getContent/671110 --> page 1112, which reads: > "#UD If CPUID.01H:ECX.POPCNT[23] = 0" for all the CPU modes. > > I did this because it was easy and it proves that I'm getting the cpuid > feature advertising right. But I suspect the correct solution is slightly > more complex - it is to create a new dirtyhelper for sse4 and move the > feature there, because POPCNT belongs to sse4.2. Can you confirm, please? POPCNT has its own cpuid flag, independent from sse4.2 (and BMI1). ECX bit 23 for cpuid selector 0x00000001. Which looks like what you added? This is correct. We probably should also add a new new dirtyhelper for sse4 once all the sse4.1 (and sse4.2) instructions are implemented. The reason I am a little hesitant is that we treat lzcnt differently (we do check the underlying cpu does implement it) The lzcnt flag is EXC bit 5 for cpuid selecter 0x80000001 Which we currently don't set (for x86, it is set for amd64 supporting avx2) > For the testcase, I've kept randULong() in place, because the unsigned long > type is 32 bits wide on 32 bit intel arch, so it seems correct to me. Can > you confirm, please? You already fixed this in the followup patch. UInt and ULong are the same length across all arches. -- You are receiving this mail because: You are watching all bug changes.
