https://bugs.kde.org/show_bug.cgi?id=520753
--- Comment #4 from Mark Wielaard <[email protected]> --- (In reply to mcermak from comment #3) > Created attachment 192784 [details] > proposed patch > > This proposed patch seems to address the requirement. Yes. The code looks good. Please do update the commit message a little. "sowftare" -> "software" I find "Instead it is run in the HW, but indirectly - via the BSR instruction. In fact, LZCNT was introduced with BMI in the Haswell processor." a little confusing because it was originally a AMD extension, and we don't implement BMI for x86. Maybe just say: "The LZCNT instruction is only recognized if the host cpu supports LZCNT" > I've tested in in > QEMU/KVM by setting: > > <cpu mode="host-passthrough" check="none" migratable="on"> > <feature policy="disable" name="abm"/> > </cpu> Nice, I didn't know you could mask specific cpuid feature bits with qemu. > This testing however shows that similar update should be done also for the > amd64 case, where the LZCNT instruction is always present under valgrind. > Does it make sense to do analogous update for amd64? If so, may I do that > as part of this bug? That makes sense, it can be the same bug (or a new one). I would do it in two separate patches. -- You are receiving this mail because: You are watching all bug changes.
