https://bugs.kde.org/show_bug.cgi?id=412377
Bug ID: 412377
Summary: SIGILL on cache flushes on arm64
Product: valgrind
Version: unspecified
Platform: Other
OS: Linux
Status: REPORTED
Severity: normal
Priority: NOR
Component: vex
Assignee: jsew...@acm.org
Reporter: kilob...@angband.pl
Target Milestone: ---
Created attachment 122885
--> https://bugs.kde.org/attachment.cgi?id=122885&action=edit
patch to avoid SIGILL; doesn't implement cachegrind information
SUMMARY
Cache flush opcodes dc cvac, cvap, cvadp, civac cause valgrind to SIGILL,
despite cvac and civac being in the arch baseline (the other two, cvap and
cvadp, were added in 8.2 and 8.5 ISAs respectively). The only flush
instruction that works is cvau.
STEPS TO REPRODUCE
1. compile a program that includes "dc cvac"
2. test that it works on real hardware
3. run it under valgrind
OBSERVED RESULT
SIGILL
EXPECTED RESULT
On any arm64 machine, instructions other than dc cvap, cvadp should work.
Valgrind doesn't need to ban opcodes from newer processors by itself, thus
there's little point in banning cvap cvadp either.
ADDITIONAL INFORMATION
The function of those opcodes:
* dc cvau makes icache same as dcache (ie, flushes L1 to L2)
* dc cvac flushes all cache levels to real memory (L1-L3 to DRAM)
* dc cvap flushes to system-defined "point of persistence" -- which might be
memory controller or even no operation at all
* dc cvadp flushes to actual medium the persistent memory is backed with
(3DXpoint on Intel DCPMM, flash on HPE/IBM NVDIMM-N)
* dc civac does cvac then evicts the cacheline from L1-L3
Here's a working but incomplete patch that has been applied in Debian
(https://bugs.debian.org/930708); I see that valgrind doesn't use Phabricator
thus I'm not sure what's the appropriate place for patch submissions.
This patch stops the SIGILL, allowing use of tools like memcheck, drd or
helgrind. It does not pass appropriate information to cachegrind -- I don't
know its representation of cache levels well enough.
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