https://bugs.kde.org/show_bug.cgi?id=357059
--- Comment #3 from Julian Seward <jsew...@acm.org> --- If I had to guess, I would say that the Sept 2015 Intel docs are wrong, and that this instruction (cvtpi2ps) should behave the same way as cvtpi2pd does -- that is, a transition to MMX state happens only if the source is a MMX, not when it is a memory operand. Unfortunately the AMD docs I have don't say anything at all about it. -- You are receiving this mail because: You are watching all bug changes.