Public bug reported:

[Impact]
Early ThunderX silicon may hang when initializing the SATA controller.

[Test Case]
This was found in a reboot loop.

The latest ThunderX2 firmware (3.1) enables hardware error interrupts and
when the reset fix fails, we get a hang with the print:
[   14.839308] sd 1:0:0:0: [sdb] 468862128 512-byte logical blocks: (240 GB/224 
GiB)
[   14.846796] sd 1:0:0:0: [sdb] 4096-byte physical blocks
[   14.852036] sd 1:0:0:0: [sdb] Write Protect is off
[   14.856843] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, 
doesn't support DPO or FUA
[   14.866022] ata2.00: Enabling discard_zeroes_data

        *** NBU BAR Error 0x1e25c ***
         AddrLo 0x1d80180 AddrHi 0x0

[Regression Risk]
The fix is only compiled in on arm64, and only activated at runtime on this 
specific revision of silicon, so regression risk will be limited to a single 
platform that is only being distributed for development purposes.

** Affects: linux (Ubuntu)
     Importance: Undecided
     Assignee: dann frazier (dannf)
         Status: In Progress

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https://bugs.launchpad.net/bugs/1724117

Title:
  thunderx2 ahci errata workaround needs additional delays

Status in linux package in Ubuntu:
  In Progress

Bug description:
  [Impact]
  Early ThunderX silicon may hang when initializing the SATA controller.

  [Test Case]
  This was found in a reboot loop.

  The latest ThunderX2 firmware (3.1) enables hardware error interrupts and
  when the reset fix fails, we get a hang with the print:
  [   14.839308] sd 1:0:0:0: [sdb] 468862128 512-byte logical blocks: (240 
GB/224 GiB)
  [   14.846796] sd 1:0:0:0: [sdb] 4096-byte physical blocks
  [   14.852036] sd 1:0:0:0: [sdb] Write Protect is off
  [   14.856843] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, 
doesn't support DPO or FUA
  [   14.866022] ata2.00: Enabling discard_zeroes_data

          *** NBU BAR Error 0x1e25c ***
           AddrLo 0x1d80180 AddrHi 0x0

  [Regression Risk]
  The fix is only compiled in on arm64, and only activated at runtime on this 
specific revision of silicon, so regression risk will be limited to a single 
platform that is only being distributed for development purposes.

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