Previous kernel version:

ubuntu@ip-172-31-9-93:~$ uname -a
Linux ip-172-31-9-93 4.13.0-16-generic #19-Ubuntu SMP Wed Oct 11 18:35:14 UTC 
2017 x86_64 x86_64 x86_64 GNU/Linux
ubuntu@ip-172-31-9-93:~$ dmesg|grep TSC
[    0.000000] tsc: Fast TSC calibration using PIT
[    0.000000] [Firmware Bug]: TSC_DEADLINE disabled due to Errata; please 
update microcode to version: 0x2000014 (or later)


-proposed kernel version:

ubuntu@ip-172-31-9-93:~$ uname -a
Linux ip-172-31-9-93 4.13.0-17-generic #20-Ubuntu SMP Mon Nov 6 10:04:08 UTC 
2017 x86_64 x86_64 x86_64 GNU/Linux
ubuntu@ip-172-31-9-93:~$ dmesg|grep TSC
[    0.000000] tsc: Fast TSC calibration using PIT
[    0.071013] TSC deadline timer enabled


** Tags removed: verification-needed-artful
** Tags added: verification-done-artful

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https://bugs.launchpad.net/bugs/1724612

Title:
  x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping

Status in linux package in Ubuntu:
  In Progress
Status in linux source package in Artful:
  Fix Committed

Bug description:
  An upstream commit added Intel cpu model/microcode checks to disable
  TSC_DEADLINE due to cpu errata:

  commit bd9240a18edfbfa72e957fc2ba831cf1f13ea073
  Author: Peter Zijlstra <pet...@infradead.org>
  Date:   Wed May 31 17:52:03 2017 +0200

      x86/apic: Add TSC_DEADLINE quirk due to errata

  
  That commit is included in the Ubuntu kernels starting at artful v4.13.  
However, the commit includes a check for Skylake Xeons, but the microcode 
update version number differs based on Skylake Xeon stepping, so an additional 
commit is required to correctly check the microcode level of both stepping 3 
and stepping 4 Skylake Xeons, and disable/enable TSC_DEADLINE appropriately.

  Upstream commit that corrects the check is:

  commit 616dd5872e52493863b0202632703eebd51243dc
  Author: Len Brown <len.br...@intel.com>
  Date:   Wed Oct 11 17:16:04 2017 -0400

      x86/apic: Update TSC_DEADLINE quirk with additional SKX stepping

  
  Without the additional commit, Skylake Xeon stepping-3 cpus with the fixed 
microcode version will incorrectly have their TSC_DEADLINE disabled.

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