On Tue, 26 Jan 2010, Bjorn Helgaas wrote:
>
> which IS big enough, and we know the bridge is in fact forwarding the
> [mem 0xd0000000-0xdfffffff 64bit pref] region, because the Radeon works
> when Jeff boots with "pci=use_crs".
I bet it's a subtractive decode thing. Sure, it could be just another
undocumented range register (does anybody have the datasheet for that
thing?) but Intel tends to often have subtractive decode.
That system in question has three PCI express root ports, but two of them
have IO and memory disabled according to the lspci info. So maybe it's as
simple as that "I/O Hub PCI Express Root Port 7" just catching anything
that nobody else does, and the single IOH host chip doing the same?
> I think we should remove intel_bus.c before .33. It's breaking boxes
> and we don't know how to fix it. Even if we do find out how to fix it,
> I think we should move toward using _CRS instead, because that's what
> Windows uses and it's an easy way for the firmware to tell us about
> platform quirks.
I suspect that for 33 it is indeed best to just revert. But somebody is
bound to have information on how the actual hardware works. Yinghai?
Linus
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