This isn't really JOS kernel related, but I figured you guys may be interested anyway. It's about Transmeta, the Santa Clara start-up company with Paul Allen and Linus Torvalds. The article seems to have gotten its data from the Transmeta patent application. This is a passage from Computer Technology Review, April 1999 Volume XVIIII Number 4 in an article titled "Stealth Processor", p. 26, 28, and 47, by Joshua Piven. (the quote continues until my sig) ...Transmeta's chip, as yet unnamed, will be able to "translate" rather than emulate code from different operating systems written for other chips... Transmeta's solution is a chip, which combines a "morph host" and a "code morphing software," which create a "microprocessor, which is faster than microprocessors of the prior art, is capable of running all of the software for all of the operating systems, which may be run by a large number of families of prior art microprocessors, yet is less expensive than prior art microprocessors." More specifically, the chip (the morph host) is a processor, which includes hardware that makes the state of a target application immediately available when an exception or error occurs, while the "code morphing software translates the instructions of a target program to morph host instructions and responds to exceptions and errors by replacing the working state with the correct target state when necessary so that correct retranslations occur." Transmeta makes the absolutely stunning claim that one version of the chip, which is designed to run all available x86 applications, includes a morph host that has just 25 percent of the gates of the Pentium Pro, yet run x86 applications substantially faster than the Pentium Pro - or any other known microprocessor capable of supporting these applications. (Note that this was at the time of the patent application.) In addition, the code morphing software - combined with the morph host - allows the use of techniques, which allow the reordering and rescheduling of primitive instructions generated by a sequence of target instructions, without requiring the addition of significant circuitry. Presumably, this will help keep fabrication costs low. The chip's morph software includes technology called a "translation buffer," which caches host instructions in memory and then allows these instructions to be recalled: 1) without rerunning the process of determining which primitive instructions are required to implement each target instruction; and 2) without addressing and fetching each primitive instruction, optimizing the sequence of instructions, allocating assets to each instruction, reordering them, and without executing each step of each sequence of instructions involved each time each target instruction is executed. "Once a target instruction has been translated, it may be recalled from the translation buffer and executed without the need for any of these [steps]." ...Transmeta's patent statement ends with this sentence: "Although the [technology] has been described with relation to the emulation of x86 processors, it should be understood that [it] applies just as well to programs designed for other processor architectures and programs that execute on virtual machines, such as P code, Postscript, or Java programs." -Matt _______________________________________________ Kernel maillist - [EMAIL PROTECTED] http://jos.org/mailman/listinfo/kernel
