Hi Karthiik, On Tue, Mar 27, 2012 at 5:12 AM, KARTHIK SEKURU <[email protected]> wrote: > Hi, > > I'm doing kernel porting to arm926 based FPGA board, very minimal setup. ...snip... > If I enable data cache and debug with JTAG, Kernel ends up in > ENTRY(__delay).
So you mentioned enabling the data cache. So on the ARM, enabling the data cache means that the MMU has to be enabled. There is a "rule" that the MMU MUST be off when the kernel starts, or things won't work properly. http://lxr.linux.no/linux+v3.3/Documentation/arm/Booting#L159 You didn't mention exactly when you're enabling the data cache. If it's prior to executing the kernel, then your code needs to make sure that the MMU (and hence the data cache) has been disabled prior to running the kernel itself. The kernel will then turn the MMU, data and instruction caches on as part of its own initialization. -- Dave Hylands Shuswap, BC, Canada http://www.davehylands.com _______________________________________________ Kernelnewbies mailing list [email protected] http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
